HV: increase UOS VIOAPIC pin count

To avoid UOS virtual GSI sharing

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>

Author: gzhai7

hypervisor/arch/x86/guest/vioapic.c

@@ -41,7 +41,6 @@
 #define	IOEOI		0x40
 
 #define REDIR_ENTRIES_HW	120 /* SOS align with native ioapic */
-#define REDIR_ENTRIES_UOS	24 /* UOS pins*/
 #define	RTBL_RO_BITS	((uint64_t)(IOAPIC_RTE_REM_IRR | IOAPIC_RTE_DELIVS))
 
 #define ACRN_DBG_IOAPIC	6
@@ -568,7 +567,7 @@ vioapic_pincount(struct vm *vm)
 	if (is_vm0(vm))
 		return REDIR_ENTRIES_HW;
 	else
-		return REDIR_ENTRIES_UOS;
+		return VIOAPIC_RTE_NUM;
 }
 
 int vioapic_mmio_access_handler(struct vcpu *vcpu, struct mem_io *mmio,

hypervisor/include/public/acrn_common.h

@@ -63,6 +63,13 @@
 #define REQUEST_READ	0
 #define REQUEST_WRITE	1
 
+/* IOAPIC device model info */
+#define VIOAPIC_RTE_NUM	48  /* vioapic pins */
+
+#if VIOAPIC_RTE_NUM < 24
+#error "VIOAPIC_RTE_NUM must be larger than 23"
+#endif
+
 /* Generic VM flags from guest OS */
 #define SECURE_WORLD_ENABLED    (1UL<<0)  /* Whether secure world is enabled */