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Commit e8ac976

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Shuo A Liuwenlingz
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hv: use asm_pause() to replace inline ASM to satisfy MISRAC
pause_cpu() --> asm_pause() hlt_cpu() --> asm_hlt() inline ASM pause --> asm_pause() Tracked-On: #1821 Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
1 parent 329ea42 commit e8ac976

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6 files changed

+9
-8
lines changed

6 files changed

+9
-8
lines changed

hypervisor/arch/x86/cpu.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -301,7 +301,7 @@ void stop_cpus(void)
301301

302302
void cpu_do_idle(void)
303303
{
304-
__asm __volatile("pause" ::: "memory");
304+
asm_pause();
305305
}
306306

307307
/**
@@ -325,7 +325,7 @@ void cpu_dead(void)
325325

326326
/* Halt the CPU */
327327
do {
328-
hlt_cpu();
328+
asm_hlt();
329329
} while (halt != 0);
330330
} else {
331331
pr_err("pcpu%hu already dead", pcpu_id);

hypervisor/arch/x86/guest/vcpu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -578,7 +578,7 @@ void pause_vcpu(struct acrn_vcpu *vcpu, enum vcpu_state new_state)
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579579
if (vcpu->pcpu_id != pcpu_id) {
580580
while (atomic_load32(&vcpu->running) == 1U)
581-
__asm__ __volatile("pause" ::: "memory");
581+
asm_pause();
582582
}
583583
} else {
584584
remove_from_cpu_runqueue(&vcpu->sched_obj, vcpu->pcpu_id);

hypervisor/arch/x86/vtd.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -256,7 +256,7 @@ static inline void dmar_wait_completion(const struct dmar_drhd_rt *dmar_unit, ui
256256
}
257257
ASSERT(((rdtsc() - start) < CYCLES_PER_MS),
258258
"DMAR OP Timeout!");
259-
pause_cpu();
259+
asm_pause();
260260
}
261261
}
262262

hypervisor/debug/dump.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -247,7 +247,7 @@ void asm_assert(int32_t line, const char *file, const char *txt)
247247
show_host_call_trace(rsp, rbp, pcpu_id);
248248
dump_guest_context(pcpu_id);
249249
do {
250-
pause_cpu();
250+
asm_pause();
251251
} while (1);
252252
}
253253

hypervisor/include/arch/x86/cpu.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -306,12 +306,12 @@ static inline void cpu_msr_write(uint32_t reg, uint64_t msr_val)
306306
asm volatile (" wrmsr " : : "c" (reg), "a" ((uint32_t)msr_val), "d" ((uint32_t)(msr_val >> 32U)));
307307
}
308308

309-
static inline void pause_cpu(void)
309+
static inline void asm_pause(void)
310310
{
311311
asm volatile ("pause" ::: "memory");
312312
}
313313

314-
static inline void hlt_cpu(void)
314+
static inline void asm_hlt(void)
315315
{
316316
asm volatile ("hlt");
317317
}

hypervisor/include/debug/logmsg.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66

77
#ifndef LOGMSG_H
88
#define LOGMSG_H
9+
#include <cpu.h>
910

1011
/* Logging severity levels */
1112
#define LOG_FATAL 1U
@@ -116,6 +117,6 @@ void vprintf(const char *fmt, va_list args);
116117
#define panic(...) \
117118
do { pr_fatal("PANIC: %s line: %d\n", __func__, __LINE__); \
118119
pr_fatal(__VA_ARGS__); \
119-
while (1) { asm volatile ("pause" ::: "memory"); }; } while (0)
120+
while (1) { asm_pause(); }; } while (0)
120121

121122
#endif /* LOGMSG_H */

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