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doc: fix utf-8 punctuation, branding, spelling
Fix some stray UTF-8 punctuation and symbol characters, unnecessary trademark symbols, and some misspellings missed during regular reviews. Tracked-On: #2712 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
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doc/api/GVT-g_api.rst

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@@ -9,7 +9,7 @@ named XenGT, and over ACRN it is named AcrnGT. GVT-g can exports multiple
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virtual GPU (vGPU) instances for virtual machine system (VM). A VM could be
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assigned one vGPU instance. The guest OS graphic driver needs minor
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modification to drive the vGPU adapter in a VM. Every vGPU instance will adopt
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the full HW GPUs accelerate capability for 3D render and display.
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the full HW GPU's accelerate capability for 3D render and display.
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In the following document, AcrnGT refers to the glue layer between ACRN
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hypervisor and GVT-g core device model. It works as the agent of

doc/developer-guides/hld/hld-APL_GVT-g.rst

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@@ -10,7 +10,7 @@ Purpose of this Document
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========================
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This high-level design (HLD) document describes the usage requirements
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and high level design for Intel® Graphics Virtualization Technology for
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and high level design for Intel |reg| Graphics Virtualization Technology for
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shared virtual :term:`GPU` technology (:term:`GVT-g`) on Apollo Lake-I
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SoCs.
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========
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This document is for developers, validation teams, architects and
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maintainers of Intel® GVT-g for the Apollo Lake SoCs.
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maintainers of Intel |reg| GVT-g for the Apollo Lake SoCs.
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The reader should have some familiarity with the basic concepts of
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system virtualization and Intel® processor graphics.
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system virtualization and Intel processor graphics.
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Reference Documents
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===================
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Background
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**********
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Intel® GVT-g is an enabling technology in emerging graphics
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Intel GVT-g is an enabling technology in emerging graphics
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virtualization scenarios. It adopts a full GPU virtualization approach
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based on mediated pass-through technology, to achieve good performance,
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scalability and secure isolation among Virtual Machines (VMs). A virtual
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GPU (vGPU), with full GPU features, is presented to each VM so that a
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native graphics driver can run directly inside a VM.
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Intel® GVT-g technology for Apollo Lake (APL) has been implemented in
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Intel GVT-g technology for Apollo Lake (APL) has been implemented in
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open source hypervisors or Virtual Machine Monitors (VMMs):
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- Intel® GVT-g for ACRN, also known as, "AcrnGT"
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- Intel® GVT-g for KVM, also known as, "KVMGT"
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- Intel® GVT-g for Xen, also known as, "XenGT"
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- Intel GVT-g for ACRN, also known as, "AcrnGT"
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- Intel GVT-g for KVM, also known as, "KVMGT"
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- Intel GVT-g for Xen, also known as, "XenGT"
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The core vGPU device model is released under BSD/MIT dual license, so it
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can be reused in other proprietary hypervisors.
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productions, for example, VMware*, PCoIP*, and Microsoft* RemoteFx*.
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It is a natural path when researchers study a new type of
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I/O virtualization usage, for example, when GPGPU computing in VM was
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initially proposed. Intel® GVT-s is based on this approach.
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initially proposed. Intel GVT-s is based on this approach.
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The architecture of API forwarding is shown in :numref:`api-forwarding`:
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acceleration capability of the GPU, which is a major limitation of this
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technique. However, it is still a good approach to enable graphics
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virtualization usages on Intel server platforms, as an intermediate
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solution. Intel® GVT-d uses this mechanism.
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solution. Intel GVT-d uses this mechanism.
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.. figure:: images/APL_GVT-g-pass-through.png
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:width: 400px
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Mediated Pass-Through
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*********************
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Intel® GVT-g achieves full GPU virtualization using a "mediated
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Intel GVT-g achieves full GPU virtualization using a "mediated
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pass-through" technique.
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Concept

doc/developer-guides/hld/hld-virtio-devices.rst

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@@ -275,7 +275,7 @@ The architecture of ACRN VBS-K is shown in
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:numref:`kernel-virtio-framework` below.
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Generally VBS-K provides acceleration towards performance critical
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devices emulated by VBS-U modules by handling the data plane of the
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devices emulated by VBS-U modules by handling the "data plane" of the
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devices directly in the kernel. When VBS-K is enabled for certain
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devices, the kernel-land vring service API helpers, instead of the
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user-land helpers, are used to access the virtqueues shared by the FE

doc/developer-guides/hld/hv-ioc-virt.rst

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data comes from a raw channel, the data will be passed forward. Before
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transmitting to the virtual UART interface, all data needs to be
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packed with an address header and link header.
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- For Rx direction, the data comeis from the UOS. The IOC mediator receives link
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- For Rx direction, the data comes from the UOS. The IOC mediator receives link
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data from the virtual UART interface. The data will be unpacked by Core
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thread, and then forwarded to Rx queue, similar to how the Tx direction flow
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is done except that the heartbeat and RTC are only used by the IOC
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System control - Heartbeat
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Heartbeate frame definiton is shown here:
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Heartbeat frame definition is shown here:
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.. figure:: images/ioc-image6.png
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:width: 900px

doc/developer-guides/hld/usb-virt-hld.rst

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-s <slot>,xhci,[bus1-port1,bus2-port2],cap=platform
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- *cap*: cap means virtual xHCI capability. This parameter
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indicates virtual xHCI should emulate the named platforms xHCI
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indicates virtual xHCI should emulate the named platform's xHCI
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capabilities.
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A simple example::

doc/developer-guides/l1tf.rst

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the virtual address, the resulting address is not constrained by various
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memory range checks or nested translations. Specifically:
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* Intel® SGX protected memory checks are not applied.
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* Intel |reg| SGX protected memory checks are not applied.
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* Extended Page Table (EPT) guest physical to host physical address
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translation is not applied.
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* SMM protected memory checks are not applied.
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The following CVE entries are related to the L1TF:
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============= ================= ==============================
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CVE-2018-3615 L1 Terminal Fault Intel® SGX related aspects
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CVE-2018-3615 L1 Terminal Fault Intel SGX related aspects
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CVE-2018-3620 L1 Terminal Fault OS, SMM related aspects
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CVE-2018-3646 L1 Terminal Fault Virtualization related aspects
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============= ================= ==============================
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every guest runs in VMX non-root. It is responsibility of guest kernel
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to protect itself from malicious user space attack.
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Intel® SGX/SMM related attacks are mitigated by using latest microcode.
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Intel SGX/SMM related attacks are mitigated by using latest microcode.
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There is no additional action in ACRN hypervisor.
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Guest -> hypervisor Attack
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host PFNs, a malicious guest may use those EPT PTEs to construct an attack.
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A special aspect of L1TF in the context of virtualization is symmetric
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multi threading (SMT), e.g. Intel® Hyper-Threading Technology.
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multi threading (SMT), e.g. Intel |reg| Hyper-Threading Technology.
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Logical processors on the affected physical cores share the L1 Data Cache
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(L1D). This fact could make more variants of L1TF-based attack, e.g.
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a malicious guest running on one logical processor can attack the data which
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Affected Processors
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===================
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L1TF affects a range of Intel processors, but Intel ATOM® processors
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L1TF affects a range of Intel processors, but Intel Atom |reg| processors
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(including Apollo Lake) are immune to it. Currently ACRN hypervisor
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supports only Apollo Lake. Support for other core-based platforms is
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planned, so we still need a mitigation plan in ACRN.
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L1TF Mitigation in ACRN
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***********************
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Use the latest microcode, which mitigates SMM and Intel® SGX cases
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Use the latest microcode, which mitigates SMM and Intel SGX cases
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while also providing necessary capability for VMM to use for further
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mitigation.
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doc/developer-guides/modularity.rst

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References
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**********
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.. [IEC_61508-3] IEC 61508-3:2010, Functional safety of electrical/electronic/programmable electronic safety-related systems Part 3: Software requirements
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.. [IEC_61508-3] IEC 61508-3:2010, Functional safety of electrical/electronic/programmable electronic safety-related systems - Part 3: Software requirements
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.. [ISO_26262-6] ISO 26262-6:2011, Road vehicles - Functional safety - Part 6: Product development at the software level
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doc/developer-guides/primer.rst

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Graphic mediation
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*****************
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Intel |reg| Graphics Virtualization Technology g (Intel |reg| GVT-g)
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Intel |reg| Graphics Virtualization Technology -g (Intel |reg| GVT-g)
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provides GPU sharing capability to multiple VMs by using a mediated
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pass-through technique. This allows a VM to access performance critical
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I/O resources (usually partitioned) directly, without intervention from

doc/getting-started/apl-nuc.rst

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#. Name the host "clr-sos-guest"
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#. Add an administrative user "clear" with "sudoers" privilege
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#. Add these additional bundles "editors", "user-basic", "desktop-autostart", "network-basic"
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#. For network, choose DHCP
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#. For network, choose "DHCP"
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#. After installation is complete, boot into Clear Linux OS, login as
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**clear**, and set a password.

doc/introduction/index.rst

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*************
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In :numref:`boot-flow` we show a verified Boot Sequence with UEFI
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on an Intel |reg| Architecture platform NUC (see :ref:`hardware`).
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on an Intel Architecture platform NUC (see :ref:`hardware`).
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.. graphviz:: images/boot-flow.dot
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:name: boot-flow

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