@@ -170,18 +170,18 @@ ptirq_build_physical_rte(struct acrn_vm *vm, struct ptirq_remapping_info *entry)
170
170
union ioapic_rte virt_rte ;
171
171
bool phys ;
172
172
173
- vioapic_get_rte (vm , virt_sid -> intx_id .pin , & virt_rte );
173
+ vioapic_get_rte (vm , virt_sid -> intx_id .gsi , & virt_rte );
174
174
rte = virt_rte ;
175
175
176
176
/* init polarity & pin state */
177
177
if (rte .bits .intr_polarity == IOAPIC_RTE_INTPOL_ALO ) {
178
178
if (entry -> polarity == 0U ) {
179
- vioapic_set_irqline_nolock (vm , virt_sid -> intx_id .pin , GSI_SET_HIGH );
179
+ vioapic_set_irqline_nolock (vm , virt_sid -> intx_id .gsi , GSI_SET_HIGH );
180
180
}
181
181
entry -> polarity = 1U ;
182
182
} else {
183
183
if (entry -> polarity == 1U ) {
184
- vioapic_set_irqline_nolock (vm , virt_sid -> intx_id .pin , GSI_SET_LOW );
184
+ vioapic_set_irqline_nolock (vm , virt_sid -> intx_id .gsi , GSI_SET_LOW );
185
185
}
186
186
entry -> polarity = 0U ;
187
187
}
@@ -241,7 +241,7 @@ ptirq_build_physical_rte(struct acrn_vm *vm, struct ptirq_remapping_info *entry)
241
241
ioapic_get_rte (phys_irq , & phys_rte );
242
242
rte = phys_rte ;
243
243
rte .bits .trigger_mode = IOAPIC_RTE_TRGRMODE_EDGE ;
244
- vpic_get_irqline_trigger_mode (vm_pic (vm ), (uint32_t )virt_sid -> intx_id .pin , & trigger );
244
+ vpic_get_irqline_trigger_mode (vm_pic (vm ), (uint32_t )virt_sid -> intx_id .gsi , & trigger );
245
245
if (trigger == LEVEL_TRIGGER ) {
246
246
rte .bits .trigger_mode = IOAPIC_RTE_TRGRMODE_LEVEL ;
247
247
}
@@ -342,13 +342,13 @@ remove_msix_remapping(const struct acrn_vm *vm, uint16_t virt_bdf, uint32_t entr
342
342
* - if the entry already be added by sos_vm, then change the owner to current vm
343
343
* - if the entry already be added by other vm, return NULL
344
344
*/
345
- static struct ptirq_remapping_info * add_intx_remapping (struct acrn_vm * vm , uint32_t virt_pin ,
346
- uint32_t phys_pin , enum intx_ctlr vpin_ctlr )
345
+ static struct ptirq_remapping_info * add_intx_remapping (struct acrn_vm * vm , uint32_t virt_gsi ,
346
+ uint32_t phys_gsi , enum intx_ctlr vgsi_ctlr )
347
347
{
348
348
struct ptirq_remapping_info * entry = NULL ;
349
- DEFINE_INTX_SID (phys_sid , phys_pin , INTX_CTLR_IOAPIC );
350
- DEFINE_INTX_SID (virt_sid , virt_pin , vpin_ctlr );
351
- uint32_t phys_irq = ioapic_pin_to_irq ( phys_pin );
349
+ DEFINE_INTX_SID (phys_sid , phys_gsi , INTX_CTLR_IOAPIC );
350
+ DEFINE_INTX_SID (virt_sid , virt_gsi , vgsi_ctlr );
351
+ uint32_t phys_irq = ioapic_gsi_to_irq ( phys_gsi );
352
352
353
353
entry = ptirq_lookup_entry_by_sid (PTDEV_INTR_INTX , & phys_sid , NULL );
354
354
if (entry == NULL ) {
@@ -366,16 +366,16 @@ static struct ptirq_remapping_info *add_intx_remapping(struct acrn_vm *vm, uint3
366
366
}
367
367
}
368
368
} else {
369
- pr_err ("INTX re-add vpin %d" , virt_pin );
369
+ pr_err ("INTX re-add vpin %d" , virt_gsi );
370
370
}
371
371
} else if (entry -> vm != vm ) {
372
372
if (is_sos_vm (entry -> vm )) {
373
373
entry -> vm = vm ;
374
374
entry -> virt_sid .value = virt_sid .value ;
375
375
entry -> polarity = 0U ;
376
376
} else {
377
- pr_err ("INTX pin %d already in vm%d with vpin %d, not able to add into vm%d with vpin %d" ,
378
- phys_pin , entry -> vm -> vm_id , entry -> virt_sid .intx_id .pin , vm -> vm_id , virt_pin );
377
+ pr_err ("INTX gsi %d already in vm%d with vgsi %d, not able to add into vm%d with vgsi %d" ,
378
+ phys_gsi , entry -> vm -> vm_id , entry -> virt_sid .intx_id .gsi , vm -> vm_id , virt_gsi );
379
379
entry = NULL ;
380
380
}
381
381
} else {
@@ -389,20 +389,20 @@ static struct ptirq_remapping_info *add_intx_remapping(struct acrn_vm *vm, uint3
389
389
*/
390
390
391
391
if (entry != NULL ) {
392
- dev_dbg (DBG_LEVEL_IRQ , "VM%d INTX add pin mapping vpin %d:ppin %d" ,
393
- entry -> vm -> vm_id , virt_pin , phys_pin );
392
+ dev_dbg (DBG_LEVEL_IRQ , "VM%d INTX add pin mapping vgsi %d:pgsi %d" ,
393
+ entry -> vm -> vm_id , virt_gsi , phys_gsi );
394
394
}
395
395
396
396
return entry ;
397
397
}
398
398
399
399
/* deactive & remove mapping entry of vpin for vm */
400
- static void remove_intx_remapping (const struct acrn_vm * vm , uint32_t virt_pin , enum intx_ctlr vpin_ctlr )
400
+ static void remove_intx_remapping (const struct acrn_vm * vm , uint32_t virt_gsi , enum intx_ctlr vgsi_ctlr )
401
401
{
402
402
uint32_t phys_irq ;
403
403
struct ptirq_remapping_info * entry ;
404
404
struct intr_source intr_src ;
405
- DEFINE_INTX_SID (virt_sid , virt_pin , vpin_ctlr );
405
+ DEFINE_INTX_SID (virt_sid , virt_gsi , vgsi_ctlr );
406
406
407
407
entry = ptirq_lookup_entry_by_sid (PTDEV_INTR_INTX , & virt_sid , vm );
408
408
if (entry != NULL ) {
@@ -417,11 +417,11 @@ static void remove_intx_remapping(const struct acrn_vm *vm, uint32_t virt_pin, e
417
417
418
418
dmar_free_irte (intr_src , (uint16_t )phys_irq );
419
419
dev_dbg (DBG_LEVEL_IRQ ,
420
- "deactive %s intx entry:ppin =%d, pirq=%d " ,
421
- (vpin_ctlr == INTX_CTLR_PIC ) ? "vPIC" : "vIOAPIC" ,
422
- entry -> phys_sid .intx_id .pin , phys_irq );
423
- dev_dbg (DBG_LEVEL_IRQ , "from vm%d vpin =%d\n" ,
424
- entry -> vm -> vm_id , virt_pin );
420
+ "deactive %s intx entry:pgsi =%d, pirq=%d " ,
421
+ (vgsi_ctlr == INTX_CTLR_PIC ) ? "vPIC" : "vIOAPIC" ,
422
+ entry -> phys_sid .intx_id .gsi , phys_irq );
423
+ dev_dbg (DBG_LEVEL_IRQ , "from vm%d vgsi =%d\n" ,
424
+ entry -> vm -> vm_id , virt_gsi );
425
425
}
426
426
427
427
ptirq_release_entry (entry );
@@ -439,22 +439,22 @@ static void ptirq_handle_intx(struct acrn_vm *vm,
439
439
bool trigger_lvl = false;
440
440
441
441
/* INTX_CTLR_IOAPIC means we have vioapic enabled */
442
- vioapic_get_rte (vm , (uint32_t )virt_sid -> intx_id .pin , & rte );
442
+ vioapic_get_rte (vm , (uint32_t )virt_sid -> intx_id .gsi , & rte );
443
443
if (rte .bits .trigger_mode == IOAPIC_RTE_TRGRMODE_LEVEL ) {
444
444
trigger_lvl = true;
445
445
}
446
446
447
447
if (trigger_lvl ) {
448
448
if (entry -> polarity != 0U ) {
449
- vioapic_set_irqline_lock (vm , virt_sid -> intx_id .pin , GSI_SET_LOW );
449
+ vioapic_set_irqline_lock (vm , virt_sid -> intx_id .gsi , GSI_SET_LOW );
450
450
} else {
451
- vioapic_set_irqline_lock (vm , virt_sid -> intx_id .pin , GSI_SET_HIGH );
451
+ vioapic_set_irqline_lock (vm , virt_sid -> intx_id .gsi , GSI_SET_HIGH );
452
452
}
453
453
} else {
454
454
if (entry -> polarity != 0U ) {
455
- vioapic_set_irqline_lock (vm , virt_sid -> intx_id .pin , GSI_FALLING_PULSE );
455
+ vioapic_set_irqline_lock (vm , virt_sid -> intx_id .gsi , GSI_FALLING_PULSE );
456
456
} else {
457
- vioapic_set_irqline_lock (vm , virt_sid -> intx_id .pin , GSI_RAISING_PULSE );
457
+ vioapic_set_irqline_lock (vm , virt_sid -> intx_id .gsi , GSI_RAISING_PULSE );
458
458
}
459
459
}
460
460
@@ -470,11 +470,11 @@ static void ptirq_handle_intx(struct acrn_vm *vm,
470
470
enum vpic_trigger trigger ;
471
471
472
472
/* INTX_CTLR_PIC means we have vpic enabled */
473
- vpic_get_irqline_trigger_mode (vm_pic (vm ), virt_sid -> intx_id .pin , & trigger );
473
+ vpic_get_irqline_trigger_mode (vm_pic (vm ), virt_sid -> intx_id .gsi , & trigger );
474
474
if (trigger == LEVEL_TRIGGER ) {
475
- vpic_set_irqline (vm_pic (vm ), virt_sid -> intx_id .pin , GSI_SET_HIGH );
475
+ vpic_set_irqline (vm_pic (vm ), virt_sid -> intx_id .gsi , GSI_SET_HIGH );
476
476
} else {
477
- vpic_set_irqline (vm_pic (vm ), virt_sid -> intx_id .pin , GSI_RAISING_PULSE );
477
+ vpic_set_irqline (vm_pic (vm ), virt_sid -> intx_id .gsi , GSI_RAISING_PULSE );
478
478
}
479
479
break ;
480
480
}
@@ -525,11 +525,11 @@ void ptirq_softirq(uint16_t pcpu_id)
525
525
}
526
526
}
527
527
528
- void ptirq_intx_ack (struct acrn_vm * vm , uint32_t virt_pin , enum intx_ctlr vpin_ctlr )
528
+ void ptirq_intx_ack (struct acrn_vm * vm , uint32_t virt_gsi , enum intx_ctlr vgsi_ctlr )
529
529
{
530
530
uint32_t phys_irq ;
531
531
struct ptirq_remapping_info * entry ;
532
- DEFINE_INTX_SID (virt_sid , virt_pin , vpin_ctlr );
532
+ DEFINE_INTX_SID (virt_sid , virt_gsi , vgsi_ctlr );
533
533
534
534
entry = ptirq_lookup_entry_by_sid (PTDEV_INTR_INTX , & virt_sid , vm );
535
535
if (entry != NULL ) {
@@ -538,20 +538,20 @@ void ptirq_intx_ack(struct acrn_vm *vm, uint32_t virt_pin, enum intx_ctlr vpin_c
538
538
/* NOTE: only Level trigger will process EOI/ACK and if we got here
539
539
* means we have this vioapic or vpic or both enabled
540
540
*/
541
- switch (vpin_ctlr ) {
541
+ switch (vgsi_ctlr ) {
542
542
case INTX_CTLR_IOAPIC :
543
543
if (entry -> polarity != 0U ) {
544
- vioapic_set_irqline_lock (vm , virt_pin , GSI_SET_HIGH );
544
+ vioapic_set_irqline_lock (vm , virt_gsi , GSI_SET_HIGH );
545
545
} else {
546
- vioapic_set_irqline_lock (vm , virt_pin , GSI_SET_LOW );
546
+ vioapic_set_irqline_lock (vm , virt_gsi , GSI_SET_LOW );
547
547
}
548
548
break ;
549
549
case INTX_CTLR_PIC :
550
- vpic_set_irqline (vm_pic (vm ), virt_pin , GSI_SET_LOW );
550
+ vpic_set_irqline (vm_pic (vm ), virt_gsi , GSI_SET_LOW );
551
551
break ;
552
552
default :
553
553
/*
554
- * In this switch statement, vpin_ctlr shall either be
554
+ * In this switch statement, vgsi_ctlr shall either be
555
555
* INTX_CTLR_IOAPIC or INTX_CTLR_PIC.
556
556
* Gracefully return if prior case clauses have not been met.
557
557
*/
@@ -670,12 +670,12 @@ static void activate_physical_ioapic(struct acrn_vm *vm,
670
670
/* Main entry for PCI/Legacy device assignment with INTx, calling from vIOAPIC
671
671
* or vPIC
672
672
*/
673
- int32_t ptirq_intx_pin_remap (struct acrn_vm * vm , uint32_t virt_pin , enum intx_ctlr vpin_ctlr )
673
+ int32_t ptirq_intx_pin_remap (struct acrn_vm * vm , uint32_t virt_gsi , enum intx_ctlr vgsi_ctlr )
674
674
{
675
675
int32_t status = 0 ;
676
676
struct ptirq_remapping_info * entry = NULL ;
677
- DEFINE_INTX_SID (virt_sid , virt_pin , vpin_ctlr );
678
- DEFINE_INTX_SID (alt_virt_sid , virt_pin , vpin_ctlr );
677
+ DEFINE_INTX_SID (virt_sid , virt_gsi , vgsi_ctlr );
678
+ DEFINE_INTX_SID (alt_virt_sid , virt_gsi , vgsi_ctlr );
679
679
680
680
/*
681
681
* virt pin could come from vpic master, vpic slave or vioapic
@@ -689,7 +689,7 @@ int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint32_t virt_pin, enum intx_ct
689
689
*/
690
690
691
691
/* no remap for vuart intx */
692
- if (!is_vuart_intx (vm , virt_sid .intx_id .pin )) {
692
+ if (!is_vuart_intx (vm , virt_sid .intx_id .gsi )) {
693
693
/* query if we have virt to phys mapping */
694
694
spinlock_obtain (& ptdev_lock );
695
695
entry = ptirq_lookup_entry_by_sid (PTDEV_INTR_INTX , & virt_sid , vm );
@@ -703,38 +703,32 @@ int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint32_t virt_pin, enum intx_ct
703
703
* the other vpin source for legacy pin. If yes, then
704
704
* switch vpin source is needed
705
705
*/
706
- if (virt_pin < NR_LEGACY_PIN ) {
707
- uint32_t vpin = get_pic_pin_from_ioapic_pin (virt_pin );
706
+ if (virt_gsi < NR_LEGACY_PIN ) {
708
707
709
- if (vpin_ctlr == INTX_CTLR_PIC ) {
708
+ if (vgsi_ctlr == INTX_CTLR_PIC ) {
710
709
alt_virt_sid .intx_id .ctlr = INTX_CTLR_IOAPIC ;
711
710
} else {
712
711
alt_virt_sid .intx_id .ctlr = INTX_CTLR_PIC ;
713
712
}
714
- alt_virt_sid .intx_id .pin = vpin ;
715
713
716
714
entry = ptirq_lookup_entry_by_sid (PTDEV_INTR_INTX , & alt_virt_sid , vm );
717
715
if (entry != NULL ) {
718
716
entry -> virt_sid .value = virt_sid .value ;
719
717
dev_dbg (DBG_LEVEL_IRQ ,
720
- "IOAPIC pin =%hhu pirq=%u vpin =%d switch from %s to %s vpin=%d for vm%d" ,
721
- entry -> phys_sid .intx_id .pin ,
722
- entry -> allocated_pirq , entry -> virt_sid .intx_id .pin ,
723
- (vpin_ctlr == INTX_CTLR_IOAPIC ) ? "vPIC" : "vIOAPIC" ,
724
- (vpin_ctlr == INTX_CTLR_IOAPIC ) ? "vIOPIC" : "vPIC" ,
725
- virt_pin , entry -> vm -> vm_id );
718
+ "IOAPIC gsi =%hhu pirq=%u vgsi =%d switch from %s to %s for vm%d" ,
719
+ entry -> phys_sid .intx_id .gsi ,
720
+ entry -> allocated_pirq , entry -> virt_sid .intx_id .gsi ,
721
+ (vgsi_ctlr == INTX_CTLR_IOAPIC ) ? "vPIC" : "vIOAPIC" ,
722
+ (vgsi_ctlr == INTX_CTLR_IOAPIC ) ? "vIOPIC" : "vPIC" ,
723
+ entry -> vm -> vm_id );
726
724
}
727
725
}
728
726
729
727
/* entry could be updated by above switch check */
730
728
if (entry == NULL ) {
731
- uint32_t phys_pin = virt_pin ;
729
+ uint32_t phys_gsi = virt_gsi ;
732
730
733
- /* fix vPIC pin to correct native IOAPIC pin */
734
- if (vpin_ctlr == INTX_CTLR_PIC ) {
735
- phys_pin = get_pic_pin_from_ioapic_pin (virt_pin );
736
- }
737
- entry = add_intx_remapping (vm , virt_pin , phys_pin , vpin_ctlr );
731
+ entry = add_intx_remapping (vm , virt_gsi , phys_gsi , vgsi_ctlr );
738
732
if (entry == NULL ) {
739
733
pr_err ("%s, add intx remapping failed" ,
740
734
__func__ );
@@ -769,13 +763,13 @@ int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint32_t virt_pin, enum intx_ct
769
763
* - currently, one phys_pin can only be held by one pin source (vPIC or
770
764
* vIOAPIC)
771
765
*/
772
- int32_t ptirq_add_intx_remapping (struct acrn_vm * vm , uint32_t virt_pin , uint32_t phys_pin , bool pic_pin )
766
+ int32_t ptirq_add_intx_remapping (struct acrn_vm * vm , uint32_t virt_gsi , uint32_t phys_gsi , bool pic_pin )
773
767
{
774
768
struct ptirq_remapping_info * entry ;
775
- enum intx_ctlr vpin_ctlr = pic_pin ? INTX_CTLR_PIC : INTX_CTLR_IOAPIC ;
769
+ enum intx_ctlr vgsi_ctlr = pic_pin ? INTX_CTLR_PIC : INTX_CTLR_IOAPIC ;
776
770
777
771
spinlock_obtain (& ptdev_lock );
778
- entry = add_intx_remapping (vm , virt_pin , phys_pin , vpin_ctlr );
772
+ entry = add_intx_remapping (vm , virt_gsi , phys_gsi , vgsi_ctlr );
779
773
spinlock_release (& ptdev_lock );
780
774
781
775
return (entry != NULL ) ? 0 : - ENODEV ;
@@ -784,12 +778,12 @@ int32_t ptirq_add_intx_remapping(struct acrn_vm *vm, uint32_t virt_pin, uint32_t
784
778
/*
785
779
* @pre vm != NULL
786
780
*/
787
- void ptirq_remove_intx_remapping (const struct acrn_vm * vm , uint32_t virt_pin , bool pic_pin )
781
+ void ptirq_remove_intx_remapping (const struct acrn_vm * vm , uint32_t virt_gsi , bool pic_pin )
788
782
{
789
- enum intx_ctlr vpin_ctlr = pic_pin ? INTX_CTLR_PIC : INTX_CTLR_IOAPIC ;
783
+ enum intx_ctlr vgsi_ctlr = pic_pin ? INTX_CTLR_PIC : INTX_CTLR_IOAPIC ;
790
784
791
785
spinlock_obtain (& ptdev_lock );
792
- remove_intx_remapping (vm , virt_pin , vpin_ctlr );
786
+ remove_intx_remapping (vm , virt_gsi , vgsi_ctlr );
793
787
spinlock_release (& ptdev_lock );
794
788
}
795
789
0 commit comments