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hv: refine the left atomic operation
rename atomic_cmpxchg_int to atomic_cmpxchg replace atomic_cmpset_long with atomic_cmpxchg64 rename atomic_readandclear_long to atomic_readandclear64 Signed-off-by: Li, Fei1 <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@Intel.com>
1 parent 1f3da93 commit edb26a7

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3 files changed

+53
-80
lines changed

3 files changed

+53
-80
lines changed

hypervisor/arch/x86/guest/vlapic.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1992,7 +1992,7 @@ apicv_set_intr_ready(struct vlapic *vlapic, int vector, __unused bool level)
19921992
mask = 1UL << (vector % 64);
19931993

19941994
atomic_set_long(&pir_desc->pir[idx], mask);
1995-
notify = atomic_cmpset_long(&pir_desc->pending, 0, 1);
1995+
notify = (atomic_cmpxchg64((long *)&pir_desc->pending, 0, 1) == 0);
19961996
return notify;
19971997
}
19981998

@@ -2109,7 +2109,7 @@ apicv_inject_pir(struct vlapic *vlapic)
21092109
struct lapic_reg *irr = NULL;
21102110

21112111
pir_desc = vlapic->pir_desc;
2112-
if (atomic_cmpset_long(&pir_desc->pending, 1, 0) == 0)
2112+
if (atomic_cmpxchg64((long *)&pir_desc->pending, 1, 0) != 1)
21132113
return;
21142114

21152115
pirval = 0;
@@ -2118,7 +2118,7 @@ apicv_inject_pir(struct vlapic *vlapic)
21182118
irr = &lapic->irr[0];
21192119

21202120
for (i = 0; i < 4; i++) {
2121-
val = atomic_readandclear_long(&pir_desc->pir[i]);
2121+
val = atomic_readandclear64((long *)&pir_desc->pir[i]);
21222122
if (val != 0) {
21232123
irr[i * 2].val |= val;
21242124
irr[(i * 2) + 1].val |= val >> 32;

hypervisor/debug/uart16550.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -179,7 +179,7 @@ static int uart16550_open(struct tgt_uart *tgt_uart,
179179
int status = 0;
180180

181181
if (strcmp(tgt_uart->uart_id, "STDIO") == 0) {
182-
if (atomic_cmpxchg_int(&tgt_uart->open_count, 0, 1) != 0)
182+
if (atomic_cmpxchg(&tgt_uart->open_count, 0, 1) != 0)
183183
return -EBUSY;
184184

185185
/* Call UART setup function */
@@ -264,7 +264,7 @@ static int uart16550_get_rx_err(uint32_t rx_data)
264264
static void uart16550_close(struct tgt_uart *tgt_uart)
265265
{
266266
if (tgt_uart != NULL) {
267-
if (atomic_cmpxchg_int(&tgt_uart->open_count, 1, 0) == 1) {
267+
if (atomic_cmpxchg(&tgt_uart->open_count, 1, 0) == 1) {
268268
/* TODO: Add logic to disable the UART */
269269
}
270270
}

hypervisor/include/lib/atomic.h

Lines changed: 48 additions & 75 deletions
Original file line numberDiff line numberDiff line change
@@ -56,28 +56,6 @@ static inline void name(volatile type *ptr, type v) \
5656
build_atomic_store(atomic_store, "l", int, p, v)
5757
build_atomic_store(atomic_store64, "q", long, p, v)
5858

59-
/*
60-
* #define atomic_set_int(P, V) (*(unsigned int *)(P) |= (V))
61-
*/
62-
static inline void atomic_set_int(unsigned int *p, unsigned int v)
63-
{
64-
__asm __volatile(BUS_LOCK "orl %1,%0"
65-
: "+m" (*p)
66-
: "r" (v)
67-
: "cc", "memory");
68-
}
69-
70-
/*
71-
* #define atomic_clear_int(P, V) (*(unsigned int *)(P) &= ~(V))
72-
*/
73-
static inline void atomic_clear_int(unsigned int *p, unsigned int v)
74-
{
75-
__asm __volatile(BUS_LOCK "andl %1,%0"
76-
: "+m" (*p)
77-
: "r" (~v)
78-
: "cc", "memory");
79-
}
80-
8159
#define build_atomic_inc(name, size, type, ptr) \
8260
static inline void name(type *ptr) \
8361
{ \
@@ -98,25 +76,27 @@ static inline void name(type *ptr) \
9876
build_atomic_dec(atomic_dec, "l", int, p)
9977
build_atomic_dec(atomic_dec64, "q", long, p)
10078

101-
10279
/*
103-
* #define atomic_swap_int(P, V) \
104-
* (return (*(unsigned int *)(P)); *(unsigned int *)(P) = (V);)
80+
* #define atomic_set_int(P, V) (*(unsigned int *)(P) |= (V))
10581
*/
106-
static inline int atomic_swap_int(unsigned int *p, unsigned int v)
82+
static inline void atomic_set_int(unsigned int *p, unsigned int v)
10783
{
108-
__asm __volatile(BUS_LOCK "xchgl %1,%0"
109-
: "+m" (*p), "+r" (v)
110-
:
84+
__asm __volatile(BUS_LOCK "orl %1,%0"
85+
: "+m" (*p)
86+
: "r" (v)
11187
: "cc", "memory");
112-
return v;
11388
}
11489

11590
/*
116-
* #define atomic_readandclear_int(P) \
117-
* (return (*(unsigned int *)(P)); *(unsigned int *)(P) = 0;)
91+
* #define atomic_clear_int(P, V) (*(unsigned int *)(P) &= ~(V))
11892
*/
119-
#define atomic_readandclear_int(p) atomic_swap_int(p, 0)
93+
static inline void atomic_clear_int(unsigned int *p, unsigned int v)
94+
{
95+
__asm __volatile(BUS_LOCK "andl %1,%0"
96+
: "+m" (*p)
97+
: "r" (~v)
98+
: "cc", "memory");
99+
}
120100

121101
/*
122102
* #define atomic_set_long(P, V) (*(unsigned long *)(P) |= (V))
@@ -140,37 +120,43 @@ static inline void atomic_clear_long(unsigned long *p, unsigned long v)
140120
: "cc", "memory");
141121
}
142122

143-
/*
144-
* #define atomic_swap_long(P, V) \
145-
* (return (*(unsigned long *)(P)); *(unsigned long *)(P) = (V);)
146-
*/
147-
static inline long atomic_swap_long(unsigned long *p, unsigned long v)
148-
{
149-
__asm __volatile(BUS_LOCK "xchgq %1,%0"
150-
: "+m" (*p), "+r" (v)
151-
:
152-
: "cc", "memory");
153-
return v;
123+
#define build_atomic_swap(name, size, type, ptr, v) \
124+
static inline type name(type *ptr, type v) \
125+
{ \
126+
asm volatile(BUS_LOCK "xchg" size " %1,%0" \
127+
: "+m" (*ptr), "+r" (v) \
128+
: \
129+
: "cc", "memory"); \
130+
return v; \
154131
}
155-
156-
/*
157-
* #define atomic_readandclear_long(P) \
158-
* (return (*(unsigned long *)(P)); *(unsigned long *)(P) = 0;)
159-
*/
160-
#define atomic_readandclear_long(p) atomic_swap_long(p, 0)
161-
162-
static inline int atomic_cmpxchg_int(unsigned int *p,
163-
int old, int new)
164-
{
165-
int ret;
166-
167-
__asm __volatile(BUS_LOCK "cmpxchgl %2,%1"
168-
: "=a" (ret), "+m" (*p)
169-
: "r" (new), "0" (old)
170-
: "memory");
171-
172-
return ret;
132+
build_atomic_swap(atomic_swap, "l", int, p, v)
133+
build_atomic_swap(atomic_swap64, "q", long, p, v)
134+
135+
/*
136+
* #define atomic_readandclear(P) \
137+
* (return (*(int *)(P)); *(int *)(P) = 0;)
138+
*/
139+
#define atomic_readandclear(p) atomic_swap(p, 0)
140+
141+
/*
142+
* #define atomic_readandclear64(P) \
143+
* (return (*(long *)(P)); *(long *)(P) = 0;)
144+
*/
145+
#define atomic_readandclear64(p) atomic_swap64(p, 0)
146+
147+
#define build_atomic_cmpxchg(name, size, type, ptr, old, new) \
148+
static inline type name(volatile type *ptr, \
149+
type old, type new) \
150+
{ \
151+
type ret; \
152+
asm volatile(BUS_LOCK "cmpxchg" size " %2,%1" \
153+
: "=a" (ret), "+m" (*p) \
154+
: "r" (new), "0" (old) \
155+
: "memory"); \
156+
return ret; \
173157
}
158+
build_atomic_cmpxchg(atomic_cmpxchg, "l", int, p, old, new)
159+
build_atomic_cmpxchg(atomic_cmpxchg64, "q", long, p, old, new)
174160

175161
#define build_atomic_xadd(name, size, type, ptr, v) \
176162
static inline type name(type *ptr, type v) \
@@ -196,17 +182,4 @@ build_atomic_xadd(atomic_xadd64, "q", long, p, v)
196182
#define atomic_inc64_return(v) atomic_add64_return((v), 1)
197183
#define atomic_dec64_return(v) atomic_sub64_return((v), 1)
198184

199-
static inline int
200-
atomic_cmpset_long(unsigned long *dst, unsigned long expect, unsigned long src)
201-
{
202-
unsigned char res;
203-
204-
__asm __volatile(BUS_LOCK "cmpxchg %3,%1\n\tsete %0"
205-
: "=q" (res), "+m" (*dst), "+a" (expect)
206-
: "r" (src)
207-
: "memory", "cc");
208-
209-
return res;
210-
}
211-
212185
#endif /* ATOMIC_H*/

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