hv: remove pci_vdev_read_cfg_u8/16/32

reduce the use of similar APIs (particularly the name confusion) for
CFG space read/write.

Tracked-On: #4433

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

Author: yliu80

hypervisor/dm/vpci/vdev.c

@@ -41,13 +41,13 @@ uint32_t pci_vdev_read_cfg(const struct pci_vdev *vdev, uint32_t offset, uint32_
 
 	switch (bytes) {
 	case 1U:
-		val = pci_vdev_read_cfg_u8(vdev, offset);
+		val = vdev->cfgdata.data_8[offset];
 		break;
 	case 2U:
-		val = pci_vdev_read_cfg_u16(vdev, offset);
+		val = vdev->cfgdata.data_16[offset >> 1U];
 		break;
 	default:
-		val = pci_vdev_read_cfg_u32(vdev, offset);
+		val = vdev->cfgdata.data_32[offset >> 2U];
 		break;
 	}
 
@@ -99,7 +99,7 @@ uint32_t pci_vdev_read_bar(const struct pci_vdev *vdev, uint32_t idx)
 	uint32_t bar, offset;
 
 	offset = pci_bar_offset(idx);
-	bar = pci_vdev_read_cfg_u32(vdev, offset);
+	bar = pci_vdev_read_cfg(vdev, offset, 4U);
 	/* Sizing BAR */
 	if (bar == ~0U) {
 		bar = vdev->vbars[idx].mask | vdev->vbars[idx].fixed;
@@ -117,14 +117,14 @@ static void pci_vdev_update_bar_base(struct pci_vdev *vdev, uint32_t idx)
 
 	vbar = &vdev->vbars[idx];
 	offset = pci_bar_offset(idx);
-	lo = pci_vdev_read_cfg_u32(vdev, offset);
+	lo = pci_vdev_read_cfg(vdev, offset, 4U);
 	if ((vbar->type != PCIBAR_NONE) && (lo != ~0U)) {
 		type = vbar->type;
 		base = lo & vbar->mask;
 
 		if (vbar->type == PCIBAR_MEM64) {
 			vbar = &vdev->vbars[idx + 1U];
-			hi = pci_vdev_read_cfg_u32(vdev, offset + 4U);
+			hi = pci_vdev_read_cfg(vdev, (offset + 4U), 4U);
 			if (hi != ~0U) {
 				hi &= vbar->mask;
 				base |= ((uint64_t)hi << 32U);

hypervisor/dm/vpci/vmsi.c

@@ -69,12 +69,12 @@ static void remap_vmsi(const struct pci_vdev *vdev)
 	uint32_t vmsi_msgdata, vmsi_addrlo, vmsi_addrhi = 0U;
 
 	/* Read the MSI capability structure from virtual device */
-	vmsi_addrlo = pci_vdev_read_cfg_u32(vdev, capoff + PCIR_MSI_ADDR);
+	vmsi_addrlo = pci_vdev_read_cfg(vdev, (capoff + PCIR_MSI_ADDR), 4U);
 	if (vdev->msi.is_64bit) {
-		vmsi_addrhi = pci_vdev_read_cfg_u32(vdev, capoff + PCIR_MSI_ADDR_HIGH);
-		vmsi_msgdata = pci_vdev_read_cfg_u16(vdev, capoff + PCIR_MSI_DATA_64BIT);
+		vmsi_addrhi = pci_vdev_read_cfg(vdev, (capoff + PCIR_MSI_ADDR_HIGH), 4U);
+		vmsi_msgdata = pci_vdev_read_cfg(vdev, (capoff + PCIR_MSI_DATA_64BIT), 2U);
 	} else {
-		vmsi_msgdata = pci_vdev_read_cfg_u16(vdev, capoff + PCIR_MSI_DATA);
+		vmsi_msgdata = pci_vdev_read_cfg(vdev, (capoff + PCIR_MSI_DATA), 2U);
 	}
 	info.vmsi_addr.full = (uint64_t)vmsi_addrlo | ((uint64_t)vmsi_addrhi << 32U);
 	info.vmsi_data.full = vmsi_msgdata;

hypervisor/dm/vpci/vpci_priv.h

@@ -37,30 +37,6 @@ static inline bool in_range(uint32_t value, uint32_t lower, uint32_t len)
 	return ((value >= lower) && (value < (lower + len)));
 }
 
-/**
- * @pre vdev != NULL
- */
-static inline uint8_t pci_vdev_read_cfg_u8(const struct pci_vdev *vdev, uint32_t offset)
-{
-	return vdev->cfgdata.data_8[offset];
-}
-
-/**
- * @pre vdev != NULL
- */
-static inline uint16_t pci_vdev_read_cfg_u16(const struct pci_vdev *vdev, uint32_t offset)
-{
-	return vdev->cfgdata.data_16[offset >> 1U];
-}
-
-/**
- * @pre vdev != NULL
- */
-static inline uint32_t pci_vdev_read_cfg_u32(const struct pci_vdev *vdev, uint32_t offset)
-{
-	return vdev->cfgdata.data_32[offset >> 2U];
-}
-
 /**
  * @pre vdev != NULL
  */