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shiqingglijinxia
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hv: instr_emul: fix 'Parameter indexing array too big at call'
- explicitly declare the array size of 'size2mask[]' otherwise, the static checking tool treats the array size to be 4, so that it complains when accessing index '4' or '8' - unify the comments style and make sure the line length less than 80 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
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hypervisor/arch/x86/guest/instr_emul.c

Lines changed: 13 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -233,7 +233,7 @@ static enum cpu_reg_name gpr_map[16] = {
233233
CPU_REG_R15
234234
};
235235

236-
static uint64_t size2mask[] = {
236+
static uint64_t size2mask[9] = {
237237
[1] = 0xffUL,
238238
[2] = 0xffffUL,
239239
[4] = 0xffffffffUL,
@@ -433,10 +433,10 @@ emulate_mov(struct vcpu *vcpu, uint64_t gpa, struct vie *vie,
433433
switch (vie->op.op_byte) {
434434
case 0x88U:
435435
/*
436-
* MOV byte from reg (ModRM:reg) to mem (ModRM:r/m)
437-
* 88/r: mov r/m8, r8
438-
* REX + 88/r: mov r/m8, r8 (%ah, %ch, %dh, %bh not available)
439-
*/
436+
* MOV byte from reg (ModRM:reg) to mem (ModRM:r/m)
437+
* 88/r: mov r/m8, r8
438+
* REX + 88/r: mov r/m8, r8 (%ah, %ch, %dh, %bh not available)
439+
*/
440440
size = 1U; /* override for byte operation */
441441
error = vie_read_bytereg(vcpu, vie, &byte);
442442
if (error == 0) {
@@ -1312,7 +1312,8 @@ emulate_stack_op(struct vcpu *vcpu, uint64_t mmio_gpa, struct vie *vie,
13121312
pr_err("TODO: inject ss exception");
13131313
}
13141314

1315-
if (vie_alignment_check(paging->cpl, size, cr0, rflags, stack_gla) != 0) {
1315+
if (vie_alignment_check(paging->cpl, size, cr0, rflags, stack_gla)
1316+
!= 0) {
13161317
/*vm_inject_ac(vcpu, 0);*/
13171318
pr_err("TODO: inject ac exception");
13181319
return 0;
@@ -1545,7 +1546,8 @@ vmm_emulate_instruction(struct vcpu *vcpu, uint64_t gpa, struct vie *vie,
15451546
}
15461547

15471548
int
1548-
vie_alignment_check(uint8_t cpl, uint8_t size, uint64_t cr0, uint64_t rf, uint64_t gla)
1549+
vie_alignment_check(uint8_t cpl, uint8_t size, uint64_t cr0, uint64_t rf,
1550+
uint64_t gla)
15491551
{
15501552
ASSERT(size == 1U || size == 2U || size == 4U || size == 8U,
15511553
"%s: invalid size %hhu", __func__, size);
@@ -1589,8 +1591,8 @@ vie_size2mask(uint8_t size)
15891591

15901592
int
15911593
vie_calculate_gla(enum vm_cpu_mode cpu_mode, enum cpu_reg_name seg,
1592-
struct seg_desc *desc, uint64_t offset, uint8_t length, uint8_t addrsize,
1593-
uint32_t prot, uint64_t *gla)
1594+
struct seg_desc *desc, uint64_t offset, uint8_t length,
1595+
uint8_t addrsize, uint32_t prot, uint64_t *gla)
15941596
{
15951597
uint64_t firstoff, low_limit, high_limit, segbase;
15961598
uint8_t glasize;
@@ -1652,11 +1654,11 @@ vie_calculate_gla(enum vm_cpu_mode cpu_mode, enum cpu_reg_name seg,
16521654
* #GP on a write access to a code segment or a
16531655
* read-only data segment.
16541656
*/
1655-
if ((type & 0x8U) != 0U) { /* code segment */
1657+
if ((type & 0x8U) != 0U) { /* code segment */
16561658
return -1;
16571659
}
16581660

1659-
if ((type & 0xAU) == 0U) { /* read-only data seg */
1661+
if ((type & 0xAU) == 0U) { /* read-only data seg */
16601662
return -1;
16611663
}
16621664
}

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