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#include <logmsg.h>
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#include "vpci_priv.h"
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- static inline uint32_t pci_bar_base (uint32_t bar )
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+ static inline uint32_t get_bar_base (uint32_t bar )
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{
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return bar & PCIM_BAR_MEM_BASE ;
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}
@@ -60,6 +60,8 @@ int32_t vdev_pt_cfgread(const struct pci_vdev *vdev, uint32_t offset,
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/**
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* @pre vdev != NULL
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+ * @pre vdev->vpci != NULL
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+ * @pre vdev->vpci->vm != NULL
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* @pre vdev->pdev != NULL
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* @pre vdev->pdev->msix.table_bar < (PCI_BAR_COUNT - 1U)
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*/
@@ -75,7 +77,7 @@ void vdev_pt_remap_msix_table_bar(struct pci_vdev *vdev)
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vm_config = get_vm_config (vm -> vm_id );
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- ASSERT (vdev -> pdev -> msix .table_bar < (PCI_BAR_COUNT - 1U ), "msix->table_bar out of range" );
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+ ASSERT (vdev -> pdev -> msix .table_bar < (PCI_BAR_COUNT - 1U ), "msix->table_bar is out of range" );
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/* Mask all table entries */
@@ -87,21 +89,21 @@ void vdev_pt_remap_msix_table_bar(struct pci_vdev *vdev)
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bar = & pdev -> bar [msix -> table_bar ];
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if (bar != NULL ) {
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- vdev -> msix . mmio_hpa = bar -> base ;
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+ msix -> mmio_hpa = bar -> base ;
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if (vm_config -> load_order == PRE_LAUNCHED_VM ) {
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- vdev -> msix . mmio_gpa = vdev -> bar [msix -> table_bar ].base ;
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+ msix -> mmio_gpa = vdev -> bar [msix -> table_bar ].base ;
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} else {
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- vdev -> msix . mmio_gpa = sos_vm_hpa2gpa (bar -> base );
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+ msix -> mmio_gpa = sos_vm_hpa2gpa (bar -> base );
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}
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- vdev -> msix . mmio_size = bar -> size ;
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+ msix -> mmio_size = bar -> size ;
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}
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/*
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* For SOS:
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* --------
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* MSI-X Table BAR Contains:
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- * Other Info + Tables + PBA Ohter info already mapped into EPT (since SOS)
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+ * Other Info + Tables + PBA Other info already mapped into EPT (since SOS)
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* Tables are handled by HV MMIO handler (4k adjusted up and down)
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* and remaps interrupts
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* PBA already mapped into EPT (since SOS)
@@ -138,10 +140,10 @@ void vdev_pt_remap_msix_table_bar(struct pci_vdev *vdev)
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*/
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- if (msix -> mmio_gpa != 0U ) {
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+ if (msix -> mmio_gpa != 0UL ) {
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if (vm_config -> load_order == PRE_LAUNCHED_VM ) {
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- addr_hi = vdev -> msix . mmio_gpa + vdev -> msix . mmio_size ;
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- addr_lo = vdev -> msix . mmio_gpa ;
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+ addr_hi = msix -> mmio_gpa + msix -> mmio_size ;
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+ addr_lo = msix -> mmio_gpa ;
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} else {
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/*
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* PCI Spec: a BAR may also map other usable address space that is not associated
@@ -226,13 +228,13 @@ static void vdev_pt_cfgwrite_bar(struct pci_vdev *vdev, uint32_t offset,
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new_bar = new_bar_uos & mask ;
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if (bar_update_normal ) {
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if (is_msix_table_bar ) {
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- vdev -> bar [idx ].base = pci_bar_base (new_bar );
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+ vdev -> bar [idx ].base = get_bar_base (new_bar );
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vdev_pt_remap_msix_table_bar (vdev );
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} else {
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vdev_pt_remap_generic_bar (vdev , idx ,
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- pci_bar_base (new_bar ));
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+ get_bar_base (new_bar ));
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- vdev -> bar [idx ].base = pci_bar_base (new_bar );
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+ vdev -> bar [idx ].base = get_bar_base (new_bar );
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}
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}
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break ;
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