HV:treewide:Update exec_vmread/exec_vmwrite and exec_vmread64/exec_vmwrite64

In the hypervisor, VMCS fields include 16-bit fields,
32-bit fields, 64-bit fields and natural-width fields.
In the current implement,  there are exec_vmread/exec_vmwrite
used for accessing 32-bit fields, 64-bit field and
natural-width fields. This usage will confue developer.
So there are many type casting for the return value and
parameters vmread/vmwrite operations.

Since exec_vmread/exec_vmwrite and exec_vmread64/exec_vmwrite64
are the same, update current exec_vmread/exec_vmwrite
implement into exec_vmread64/exec_vmwrite64 implement
and add MACRO define for exec_vmread/exec_vmwrite in
head file;
To access 64-bit fields in VMCS, callers use
exec_vmread64/exec_vmwrite64;
Update related variables type for vmread/vmwrite operations;
Update related caller according to VMCS fields size.

Note:Natural-width fields have 64 bits on processors
that support Intel 64 architecture.To access natural-width
fields in VMCS, callers still use exec_vmread/exec_vmwrite,
keep the current implementation.

V1--V2:
        This is new part of this patch serial to only
        update 64-bit vmread/vmread opertions and related
        caller, for netural width fields, still use exec_vmread
	or exec_vmwrite.
V2-->V3:
	Fix few mistake updations for netural fields in VMCS,
	just keep exec_vmread/exec_vmwrite to access them;
	Fix few mistake updations for 64-bit fields in VMCS.
V3--V4:
	Add "016ll" for 64-bit variable in log function;
	Few updates for coding style;
	Rename lssd32_idx as tr_sel in VMX module.
V4-->V5:
	Use CPU_NATURAL_LAST in the vm_get_register and
	vm_set_register to make condition statement more
	understandable.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>

Author: wuxyintel

hypervisor/arch/x86/ept.c

@@ -471,7 +471,7 @@ int ept_misconfig_vmexit_handler(__unused struct vcpu *vcpu)
 
 	/* TODO - EPT Violation handler */
 	pr_info("%s, Guest linear address: 0x%016llx ",
-			__func__, exec_vmread64(VMX_GUEST_LINEAR_ADDR));
+			__func__, exec_vmread(VMX_GUEST_LINEAR_ADDR));
 
 	pr_info("%s, Guest physical address: 0x%016llx ",
 			__func__, exec_vmread64(VMX_GUEST_PHYSICAL_ADDR_FULL));

hypervisor/arch/x86/guest/instr_emul_wrapper.c

@@ -44,8 +44,10 @@ int vm_get_register(struct vcpu *vcpu, enum cpu_reg_name reg, uint64_t *retval)
 		uint32_t field = get_vmcs_field(reg);
 
 		if (field != VMX_INVALID_VMCS_FIELD) {
-			if (reg < CPU_REG_64BIT_LAST) {
+			if (reg < CPU_REG_NATURAL_LAST) {
 				*retval = exec_vmread(field);
+			} else if (reg < CPU_REG_64BIT_LAST) {
+				*retval = exec_vmread64(field);
 			} else {
 				*retval = (uint64_t)exec_vmread16(field);
 			}
@@ -77,8 +79,10 @@ int vm_set_register(struct vcpu *vcpu, enum cpu_reg_name reg, uint64_t val)
 		uint32_t field = get_vmcs_field(reg);
 
 		if (field != VMX_INVALID_VMCS_FIELD) {
-			if (reg < CPU_REG_64BIT_LAST) {
+			if (reg < CPU_REG_NATURAL_LAST) {
 				exec_vmwrite(field, val);
+			} else if (reg <= CPU_REG_64BIT_LAST) {
+				exec_vmwrite64(field, val);
 			} else {
 				exec_vmwrite16(field, (uint16_t)val);
 			}

hypervisor/arch/x86/guest/vcpu.c

@@ -193,8 +193,8 @@ int start_vcpu(struct vcpu *vcpu)
 		 */
 		instlen = vcpu->arch_vcpu.inst_len;
 		rip = cur_context->rip;
-		exec_vmwrite(VMX_GUEST_RIP, ((rip + instlen) &
-				0xFFFFFFFFFFFFFFFF));
+		exec_vmwrite(VMX_GUEST_RIP, ((rip +(uint64_t)instlen) &
+				0xFFFFFFFFFFFFFFFFUL));
 
 		/* Resume the VM */
 		status = vmx_vmrun(cur_context, VM_RESUME, ibrs_type);

hypervisor/arch/x86/guest/vlapic.c

@@ -2221,14 +2221,14 @@ apicv_set_tmr(__unused struct vlapic *vlapic, uint32_t vector, bool level)
 	mask = 1UL << (vector % 64U);
 	field = VMX_EOI_EXIT(vector);
 
-	val = exec_vmread(field);
+	val = exec_vmread64(field);
 	if (level) {
 		val |= mask;
 	} else {
 		val &= ~mask;
 	}
 
-	exec_vmwrite(field, val);
+	exec_vmwrite64(field, val);
 }
 
 /* Update the VMX_EOI_EXIT according to related tmr */

hypervisor/arch/x86/trusty.c

@@ -232,7 +232,7 @@ static void save_world_ctx(struct run_context *context)
 	 * the wrmsr handler keeps track of 'ia32_pat', and we only
 	 * need to load 'vmx_ia32_pat' here.
 	 */
-	context->vmx_ia32_pat = exec_vmread(VMX_GUEST_IA32_PAT_FULL);
+	context->vmx_ia32_pat = exec_vmread64(VMX_GUEST_IA32_PAT_FULL);
 	context->ia32_efer = exec_vmread64(VMX_GUEST_IA32_EFER_FULL);
 	context->ia32_sysenter_esp = exec_vmread(VMX_GUEST_IA32_SYSENTER_ESP);
 	context->ia32_sysenter_eip = exec_vmread(VMX_GUEST_IA32_SYSENTER_EIP);
@@ -426,7 +426,7 @@ static bool init_secure_world_env(struct vcpu *vcpu,
 
 	exec_vmwrite(VMX_GUEST_RSP,
 		TRUSTY_EPT_REBASE_GPA + size);
-	exec_vmwrite(VMX_TSC_OFFSET_FULL,
+	exec_vmwrite64(VMX_TSC_OFFSET_FULL,
 		vcpu->arch_vcpu.contexts[SECURE_WORLD].tsc_offset);
 
 	return setup_trusty_info(vcpu, size, base_hpa);