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Devil May Cry 4 Trial crashes on startup when Dynarec is on #789

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Pipetto-crypto opened this issue Mar 18, 2023 · 10 comments
Closed

Devil May Cry 4 Trial crashes on startup when Dynarec is on #789

Pipetto-crypto opened this issue Mar 18, 2023 · 10 comments

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@Pipetto-crypto
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Device Used:

Android 13, proot

Steps to reproduce:

Boot the game with BOX86_LOG=1 env variable, press play and select any of the two available play modes. The game will crash soon afterwards with this error:

30718|SIGILL @0x54c61490 (???(0x54c61490)) (x86pc=0xa515c4/???:"???", esp=0x21d840, stack=0xf3f91000:0xf4791000 own=(nil) fp=0x23fb28), for accessing 0x54c61490 (code=1/prot=7), db=0x6c1b1908(0x54c6104c:0x54c6177c/0xa514cc:0xa51671/???:clean, hash:4a0c2c3e/4a0c2c3e)
EAX:0x000007cf ECX:0x00000007 EDX:0x000007cf EBX:0x11129f48
ESP:0x0021d840 EBP:0x0c36f1d4 ESI:0x00000001 EDI:0x00000000
ESP-0x10:0x00a514cc ESP-0x0c:0x00000001 ESP-0x08:0x00000002 ESP-0x04:0xffffffff
ESP+0x00:0x00000016 ESP+0x04:0x0c36f1d4 ESP+0x08:0x110ffee8 ESP+0x0c:0x0c0cb7c0 opcode=4B 80 B2 F3 5A E1 2A F2 x86opcode=EB 70 8B 13 DB 03 85 D2

wine: Unhandled illegal instruction at address 00A515C4 (thread 0320), starting debugger.

The game works correctly with BOX86_DYNAREC=0 env variable.
@ptitSeb
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ptitSeb commented Mar 18, 2023

I can see one of the generated ARM opcode is not correct, but I cannot track back the wrong box86 code.
Can you set some log, I would need the dynarec dump block for the failed instruction.

Using ~/.box86rc create a [XXXX.exe] section with XXX the name of the exe and add

BOX86_TRACE_FILE=~/dump.txt
BOX86_DYNAREC_DUMP=1
BOX86_LOG=1

Than I simply need the block with the failled instctuion. So it was at ̀0xa515c4 in the previous run, but it will certainly change on next run. It's the x86pc= value on the SIGILL line.

@Pipetto-crypto
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Pipetto-crypto commented Mar 18, 2023 •
edited by ptitSeb
Loading

This is the block before the SIGill

16756|Emitting 220 bytes for 60 x86 bytes
0xa46dc6: F3 0F 10 4D E8  MOVSS Gx, Ex
0x2fa3941c: 3 emited opcodes, inst=0, barrier=0 state=0/0(0), set=0/0, use=0, need=0/0 sm=0/0 Q4:XMM1
	e5192018	LDR r2, [r9, #-24]
	f3088158	VEOR Q4, Q4, Q4
	ee082b10	VMOV.32 D8[0], r2
0xa46dcb: 8B 44 24 1C  MOV Gd, Ed
0x2fa39428: 1 emited opcodes, inst=1, barrier=0 state=0/0(0), set=0/0, use=0, need=0/0 sm=0/0, pred=0 Q4:XMM1
	e598401c	LDR r4, [r8, #28]
0xa46dcf: 83 44 24 14 10  ADD Ed, Ib
0x2fa3942c: 3 emited opcodes, inst=2, barrier=0 state=3/0(0), set=3F/0, use=0, need=0/0 sm=0/0, pred=1 Q4:XMM1
	e5981014	LDR r1, [r8, #20]
	e2811010	ADD r1, r1, #0x10
	e5881014	STR r1, [r8, #20]
0xa46dd4: 83 44 24 10 18  ADD Ed, Ib
0x2fa39438: 3 emited opcodes, inst=3, barrier=0 state=3/1(0), set=3F/0, use=0, need=0/0 sm=0/1, pred=2 Q4:XMM1
	e5981010	LDR r1, [r8, #16]
	e2811018	ADD r1, r1, #0x18
	e5881010	STR r1, [r8, #16]
0xa46dd9: F3 0F 59 C8  MULSS Gx, Ex
0x2fa39444: 3 emited opcodes, inst=4, barrier=0 state=0/1(0), set=0/0, use=0, need=0/0 sm=0/1, pred=3 Q4:XMM1 Q5:xmm0
	e2801f79	ADD r1, r0, #0x1e4
	f421aa8f	VLD1.32 {D10, D11}, [r1]
	ee288a0a	VMUL.F32 S16, S16, S20
0xa46ddd: F3 0F 11 4D 48  MOVSS Ex, Gx
0x2fa39450: 2 emited opcodes, inst=5, barrier=0 state=0/1(0), set=0/0, use=0, need=0/0 sm=0/1, pred=4 Q4:XMM1 Q5:xmm0
	ee182b10	VMOV.S32 r2, D8[0]
	e5892048	STR r2, [r9, #72]
0xa46de2: 83 C0 01  ADD Ed, Ib
0x2fa39458: 1 emited opcodes, inst=6, barrier=0 state=3/1(0), set=3F/0, use=0, need=0/0 sm=0/1, pred=5 Q4:XMM1 Q5:xmm0
	e2844001	ADD r4, r4, #0x1
0xa46de5: 83 C5 04  ADD Ed, Ib
0x2fa3945c: 1 emited opcodes, inst=7, barrier=0 state=3/1(0), set=3F/0, use=0, need=0/0 sm=0/1, pred=6 Q4:XMM1 Q5:xmm0
	e2899004	ADD r9, r9, #0x4
0xa46de8: 3B 83 C4 00 00 00  CMP Gd, Ed
0x2fa39460: 9 emited opcodes, inst=8, barrier=0 state=3/1(0), set=3F/81, use=0, need=0/81 sm=0/1, pred=7 Q4:XMM1 Q5:xmm0
	e59720c4	LDR r2, [r7, #196]
	e5804270	STR r4, [r0, #624]
	e5802274	STR r2, [r0, #628]
	e300e02a	MOVW LR, #0x2a
	e580e26c	STR LR, [r0, #620]
	e0543002	SUBS r3, r4, r2
	e5803278	STR r3, [r0, #632]
	e3ccc041	BIC r12, r12, #0x41
	338cc001	ORRCC r12, r12, #0x1
0xa46dee: 89 44 24 1C  MOV Ed, Gd
0x2fa39484: 1 emited opcodes, inst=9, barrier=0 state=0/3(0), set=0/0, use=0, need=81/81 sm=0/1, pred=8 Q4:XMM1 Q5:xmm0
	e588401c	STR r4, [r8, #28]
0xa46df2: 0F 82 88 FD FF FF  JC id
0x2fa39488: 11 emited opcodes, inst=10, barrier=0 state=0/3(0), set=0/0, use=1, need=81/80 sm=0/1, pred=9, jmp=out Q4:XMM1 Q5:xmm0
	e31c0001	TST r12, #0x1
	0a000008	BEQ +10
	Purge locally SSE Cache ------
	e2801f7d	ADD r1, r0, #0x1f4
	f4018a8d	VST1.32 {D8, D9}, [r1]!
	------ Purge SSE Cache
Jump to next
	e30d2e08	MOVW r2, #0xde08
	e3472937	MOVT r2, #0x7937
	e306eb80	MOVW LR, #0x6b80
	e340e0a4	MOVT LR, #0xa4
	e5923000	LDR r3, [r2, #0]
	e1a0100e	MOV r1, LR
	e12fff13	BX r3
0xa46df8: 5F  POP reg
0x2fa394b4: 1 emited opcodes, inst=11, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=10 Q4:XMM1 Q5:xmm0
	e498b004	LDR r11, [r8], #4
0xa46df9: 5E  POP reg
0x2fa394b8: 1 emited opcodes, inst=12, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=11 Q4:XMM1 Q5:xmm0
	e498a004	LDR r10, [r8], #4
0xa46dfa: 5D  POP reg
0x2fa394bc: 1 emited opcodes, inst=13, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=12 Q4:XMM1 Q5:xmm0
	e4989004	LDR r9, [r8], #4
0xa46dfb: 5B  POP reg
0x2fa394c0: 1 emited opcodes, inst=14, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=13 Q4:XMM1 Q5:xmm0
	e4987004	LDR r7, [r8], #4
0xa46dfc: 83 C4 18  ADD Ed, Ib
0x2fa394c4: 3 emited opcodes, inst=15, barrier=0 state=3/3(0), set=3F/80, use=0, need=0/80 sm=0/0, pred=14 Q4:XMM1 Q5:xmm0
	e2888018	ADD r8, r8, #0x18
	Purge SSE Cache ------
	e2801f7d	ADD r1, r0, #0x1f4
	f4018a8d	VST1.32 {D8, D9}, [r1]!
	------ Purge SSE Cache
0xa46dff: C2 04 00  RETN
0x2fa394d0: 10 emited opcodes, inst=16, barrier=2 state=0/3(0), set=0/0, use=80, need=80/0 sm=0/0, pred=15
Retn epilog
	e498e004	LDR LR, [r8], #4
	e2888004	ADD r8, r8, #0x4
	e3012398	MOVW r2, #0x1398
	e3462334	MOVT r2, #0x6334
	e1a0382e	LSR r3, LR, #0x10
	e7922103	LDR r2, [r2, r3, lsl #2]
	e7ef305e	UBFX r3, LR, #0, #16
	e7923103	LDR r3, [r2, r3, lsl #2]
	e1a0100e	MOV r1, LR
	e12fff13	BX r3
---- END OF BLOCK ---- (17, 0 sons)
16756|SIGILL @0x52c63a44 (???(0x52c63a44)) (x86pc=0xa515c4/???:"???", esp=0x21d840, stack=0xec5b0000:0xecdb0000 own=(nil) fp=0x23fb28), for accessing 0x52c63a44 (code=1/prot=7), db=0x6188b930(0x52c63600:0x52c63d30/0xa514cc:0xa51671/???:clean, hash:4a0c2c3e/4a0c2c3e)
EAX:0x000007cf ECX:0x00000007 EDX:0x000007cf EBX:0x11149f48 
ESP:0x0021d840 EBP:0x0c38f1c4 ESI:0x00000001 EDI:0x00000000 
ESP-0x10:0x00a514cc ESP-0x0c:0x00000001 ESP-0x08:0x00000002 ESP-0x04:0xffffffff
ESP+0x00:0x00000016 ESP+0x04:0x0c38f1c4 ESP+0x08:0x1111fee8 ESP+0x0c:0x0c0eb7b0 opcode=4B 80 B2 F3 5A E1 2A F2 x86opcode=EB 70 8B 13 DB 03 85 D2
16756|Emitting 168 bytes for 60 x86 bytes

@ptitSeb
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ptitSeb commented Mar 18, 2023 •
edited
Loading

Nope, that's not the correct block. Look for 0xa515c4 it should be before.

It should some something like

0xa515c4: EB 70 JMP Ib

@Pipetto-crypto
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Pipetto-crypto commented Mar 18, 2023 •
edited by ptitSeb
Loading 

Extend block 0xfffab0f4, 0xa51501 -> 0xa51501 (ninst=13, jump from 11)
Extend block 0xfffab0f4, 0xa5150e -> 0xa5150e (ninst=18, jump from 15)
Forward extend block 0xa51538 -> 0xa51540
Extend block 0xfffab0f4, 0xa5154c -> 0xa5154c (ninst=38, jump from 36)
Extend block 0xfffab0f4, 0xa5159e -> 0xa5159e (ninst=59, jump from 56)
Extend block 0xfffab0f4, 0xa515c6 -> 0xa515c6 (ninst=71, jump from 4)
Extend block 0xfffab0f4, 0xa51626 -> 0xa51626 (ninst=98, jump from 96)
16756|Emitting 1840 bytes for 421 x86 bytes
0xa514cc: 3C 01  CMP AL, Ib
0x52c63600: 8 emited opcodes, inst=0, barrier=0 state=3/0(0), set=3F/8, use=0, need=0/8 sm=0/0
	e6ef1074	UXTB r1, r4}
	e3002001	MOVW r2, #0x1
	e300e000	MOVW LR, #0x0
	e580e26c	STR LR, [r0, #620]
	e0413002	SUB r3, r1, r2
	e31300ff	TST r3, #0xff
	038cc040	ORREQ r12, r12, #0x40
	13ccc040	BICNE r12, r12, #0x40
0xa514ce: 0F 85 6A 01 00 00  JNZ id
0x52c63620: 15 emited opcodes, inst=1, barrier=0 state=0/1(1), set=0/0, use=8, need=8/0 sm=0/0, pred=0, jmp=103
	e31c0040	TST r12, #0x40
	1a00000c	BNE +14
	Cache Transform ---- ninst=1 -> 103
	  - Loading ST1
	e59030ac	LDR r3, [r0, #172]
	e2833001	ADD r3, r3, #0x1
	e2033007	AND r3, r3, #0x7
	e0802183	ADD r2, r0, r3, lsl #3
	ed929b0b	VLDR D9, [r2, #44]
	  - Loading ST0
	e2433001	SUB r3, r3, #0x1
	e2033007	AND r3, r3, #0x7
	e0802183	ADD r2, r0, r3, lsl #3
	ed92bb0b	VLDR D11, [r2, #44]
	  - Loading XMM0
	e2801f79	ADD r1, r0, #0x1e4
	f421ca8d	VLD1.32 {D12, D13}, [r1]!
	  - Loading xmm1
	f421ea8d	VLD1.32 {D14, D15}, [r1]!
	---- Cache Transform
	ea000162	B +356
0xa514d4: 8B 4C 24 2C  MOV Gd, Ed
0x52c6365c: 1 emited opcodes, inst=2, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=1
	e598502c	LDR r5, [r8, #44]
0xa514d8: 83 F9 06  CMP Ed, Ib
0x52c63660: 5 emited opcodes, inst=3, barrier=0 state=3/1(1), set=3F/9, use=0, need=0/9 sm=0/0, pred=2
	e3002006	MOVW r2, #0x6
	e0553002	SUBS r3, r5, r2
	e3ccc041	BIC r12, r12, #0x41
	038cc040	ORREQ r12, r12, #0x40
	338cc001	ORRCC r12, r12, #0x1
0xa514db: 0F 84 E5 00 00 00  JZ id
0x52c63674: 2 emited opcodes, inst=4, barrier=0 state=0/1(1), set=0/0, use=8, need=9/9 sm=0/0, pred=3, jmp=72
	e31c0040	TST r12, #0x40
	1a0000fd	BNE +255
0xa514e1: 0F 86 57 01 00 00  JBE id
0x52c6367c: 15 emited opcodes, inst=5, barrier=0 state=0/1(1), set=0/0, use=9, need=9/0 sm=0/0, pred=4, jmp=103
	e31c0041	TST r12, #0x41
	0a00000c	BEQ +14
	Cache Transform ---- ninst=5 -> 103
	  - Loading ST1
	e59030ac	LDR r3, [r0, #172]
	e2833001	ADD r3, r3, #0x1
	e2033007	AND r3, r3, #0x7
	e0802183	ADD r2, r0, r3, lsl #3
	ed929b0b	VLDR D9, [r2, #44]
	  - Loading ST0
	e2433001	SUB r3, r3, #0x1
	e2033007	AND r3, r3, #0x7
	e0802183	ADD r2, r0, r3, lsl #3
	ed92bb0b	VLDR D11, [r2, #44]
	  - Loading XMM0
	e2801f79	ADD r1, r0, #0x1e4
	f421ca8d	VLD1.32 {D12, D13}, [r1]!
	  - Loading xmm1
	f421ea8d	VLD1.32 {D14, D15}, [r1]!
	---- Cache Transform
	ea00014b	B +333
0xa514e7: 83 F9 09  CMP Ed, Ib
0x52c636b8: 5 emited opcodes, inst=6, barrier=0 state=3/1(1), set=3F/9, use=0, need=0/9 sm=0/0, pred=5
	e3002009	MOVW r2, #0x9
	e0553002	SUBS r3, r5, r2
	e3ccc041	BIC r12, r12, #0x41
	038cc040	ORREQ r12, r12, #0x40
	338cc001	ORRCC r12, r12, #0x1
0xa514ea: 0F 87 4E 01 00 00  JNBE id
0x52c636cc: 15 emited opcodes, inst=7, barrier=0 state=0/1(1), set=0/0, use=9, need=9/0 sm=0/0, pred=6, jmp=103
	e31c0041	TST r12, #0x41
	1a00000c	BNE +14
	Cache Transform ---- ninst=7 -> 103
	  - Loading ST1
	e59030ac	LDR r3, [r0, #172]
	e2833001	ADD r3, r3, #0x1
	e2033007	AND r3, r3, #0x7
	e0802183	ADD r2, r0, r3, lsl #3
	ed929b0b	VLDR D9, [r2, #44]
	  - Loading ST0
	e2433001	SUB r3, r3, #0x1
	e2033007	AND r3, r3, #0x7
	e0802183	ADD r2, r0, r3, lsl #3
	ed92bb0b	VLDR D11, [r2, #44]
	  - Loading XMM0
	e2801f79	ADD r1, r0, #0x1e4
	f421ca8d	VLD1.32 {D12, D13}, [r1]!
	  - Loading xmm1
	f421ea8d	VLD1.32 {D14, D15}, [r1]!
	---- Cache Transform
	ea000137	B +313
0xa514f0: 33 C0  XOR Gd, Ed
0x52c63708: 1 emited opcodes, inst=8, barrier=0 state=3/1(1), set=3F/0, use=0, need=0/0 sm=0/0, pred=7
	e0244004	EOR r4, r4, r4
0xa514f2: 83 F9 07  CMP Ed, Ib
0x52c6370c: 4 emited opcodes, inst=9, barrier=0 state=3/1(1), set=3F/8, use=0, need=0/8 sm=0/0, pred=8
	e3002007	MOVW r2, #0x7
	e0553002	SUBS r3, r5, r2
	e3ccc041	BIC r12, r12, #0x41
	038cc040	ORREQ r12, r12, #0x40
0xa514f5: 89 44 24 24  MOV Ed, Gd
0x52c6371c: 1 emited opcodes, inst=10, barrier=0 state=0/1(1), set=0/0, use=0, need=8/8 sm=0/0, pred=9
	e5884024	STR r4, [r8, #36]
0xa514f9: 75 06  JNZ ib
0x52c63720: 2 emited opcodes, inst=11, barrier=0 state=0/1(1), set=0/0, use=8, need=8/0 sm=0/1, pred=10, jmp=14
	e31c0040	TST r12, #0x40
	0a000003	BEQ +5
0xa514fb: 0F BF 45 26  MOVSX Gd, Ew
0x52c63728: 1 emited opcodes, inst=12, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=11
	e1d942f6	LDRSH r4, [r9, #38]
0xa514ff: EB 3F  JMP Ib
0x52c6372c: 3 emited opcodes, inst=13, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=12, jmp=34
	Cache Transform ---- ninst=13 -> 34
	  - Loading XMM1
	e2801f7d	ADD r1, r0, #0x1f4
	f4218a8d	VLD1.32 {D8, D9}, [r1]!
	---- Cache Transform
	ea000058	B +90
Reset Caches with 11
0xa51501: 83 F9 08  CMP Ed, Ib
0x52c63738: 4 emited opcodes, inst=14, barrier=0 state=3/1(1), set=3F/8, use=0, need=0/8 sm=0/1, pred=11
	e3002008	MOVW r2, #0x8
	e0553002	SUBS r3, r5, r2
	e3ccc041	BIC r12, r12, #0x41
	038cc040	ORREQ r12, r12, #0x40
0xa51504: 75 08  JNZ ib
0x52c63748: 2 emited opcodes, inst=15, barrier=0 state=0/1(1), set=0/0, use=8, need=8/0 sm=0/1, pred=14, jmp=19
	e31c0040	TST r12, #0x40
	0a000005	BEQ +7
0xa51506: 0F BF 45 26  MOVSX Gd, Ew
0x52c63750: 1 emited opcodes, inst=16, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=15
	e1d942f6	LDRSH r4, [r9, #38]
0xa5150a: 03 03  ADD Gd, Ed
0x52c63754: 2 emited opcodes, inst=17, barrier=0 state=3/1(1), set=3F/0, use=0, need=0/0 sm=0/1, pred=16
	e5971000	LDR r1, [r7, #0]
	e0844001	ADD r4, r4, r1
0xa5150c: EB 32  JMP Ib
0x52c6375c: 3 emited opcodes, inst=18, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=17, jmp=34
	Cache Transform ---- ninst=18 -> 34
	  - Loading XMM1
	e2801f7d	ADD r1, r0, #0x1f4
	f4218a8d	VLD1.32 {D8, D9}, [r1]!
	---- Cache Transform
	ea00004c	B +78
Reset Caches with 15
0xa5150e: 83 F9 09  CMP Ed, Ib
0x52c63768: 4 emited opcodes, inst=19, barrier=0 state=3/1(1), set=3F/8, use=0, need=0/8 sm=0/1, pred=15
	e3002009	MOVW r2, #0x9
	e0553002	SUBS r3, r5, r2
	e3ccc041	BIC r12, r12, #0x41
	038cc040	ORREQ r12, r12, #0x40
0xa51511: 75 47  JNZ ib
0x52c63778: 5 emited opcodes, inst=20, barrier=0 state=0/1(1), set=0/0, use=8, need=8/0 sm=0/1, pred=19, jmp=43
	e31c0040	TST r12, #0x40
	1a000002	BNE +4
	Cache Transform ---- ninst=20 -> 43
	  - Loading XMM1
	e2801f7d	ADD r1, r0, #0x1f4
	f4218a8d	VLD1.32 {D8, D9}, [r1]!
	---- Cache Transform
	ea00005d	B +95
0xa51513: 0F BF 45 26  MOVSX Gd, Ew
0x52c6378c: 1 emited opcodes, inst=21, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=20
	e1d942f6	LDRSH r4, [r9, #38]
0xa51517: 8B 0B  MOV Gd, Ed
0x52c63790: 1 emited opcodes, inst=22, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=21
	e5975000	LDR r5, [r7, #0]
0xa51519: 85 C9  TEST Ed, Gd
0x52c63794: 4 emited opcodes, inst=23, barrier=0 state=3/1(1), set=3F/30, use=0, need=0/30 sm=0/1, pred=22
	e7cbc59f	BFC r12, #11, #1
	e0153005	ANDS r3, r5, r5
	e1a0efa3	LSR LR, r3, #0x1f
	e7c7c39e	BFI r12, LR, #7, #1
0xa5151b: 89 44 24 24  MOV Ed, Gd
0x52c637a4: 1 emited opcodes, inst=24, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=23
	e5884024	STR r4, [r8, #36]
0xa5151f: DB 44 24 24  FILD ST0, Ed
0x52c637a8: 3 emited opcodes, inst=25, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=24 D8:ST0 X87:0/1(+1/-0)1
	e5981024	LDR r1, [r8, #36]
	ee001a10	VMOV S0, r1
	eeb88bc0	VCVT.F64.S32 D8, S0
0xa51523: D8 CC  FMUL ST0, STx
0x52c637b4: 6 emited opcodes, inst=26, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=25 D8:ST0 D9:ST4 X87:1/1(+0/-0)1 CMB:0/4
	Create and populate x87 Cache for ST4
	e59020ac	LDR r2, [r0, #172]
	e2822003	ADD r2, r2, #0x3
	e2022007	AND r2, r2, #0x7
	e0802182	ADD r2, r0, r2, lsl #3
	ed929b0b	VLDR D9, [r2, #44]
	-------x87 Cache for ST4
	ee288b09	VMUL.F64 D8, D8, D9
0xa51525: DB 03  FILD ST0, Ed
0x52c637cc: 3 emited opcodes, inst=27, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=26 D8:ST1 D9:ST5 D10:ST0 X87:1/2(+1/-0)2
	e5971000	LDR r1, [r7, #0]
	ee001a10	VMOV S0, r1
	eeb8abc0	VCVT.F64.S32 D10, S0
0xa51527: 7D 06  JGE ib
0x52c637d8: 3 emited opcodes, inst=28, barrier=0 state=0/1(1), set=0/0, use=30, need=30/0 sm=0/1, pred=27, jmp=30 D8:ST1 D9:ST5 D10:ST0 X87:2/2(+0/-0)2
	e02c120c	EOR r1, r12, r12, lsl #4
	e3110b02	TST r1, #0x800
	0a000004	BEQ +6
0xa51529: D8 05 40 62 C1 00  FADD ST0, float[ED]
0x52c637e4: 5 emited opcodes, inst=29, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=28 D8:ST1 D9:ST5 D10:ST0 X87:2/2(+0/-0)2
	e3062240	MOVW r2, #0x6240
	e34020c1	MOVT r2, #0xc1
	ed920a00	VLDR S0, [r2, #0]
	eeb71ac0	VCVT.F64.F32 D1, S0
	ee3aab01	VADD.F64 D10, D10, D1
0xa5152f: DE C9  FMULP STx, ST0
0x52c637f8: 1 emited opcodes, inst=30, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=28/29 D8:ST1 D9:ST5 D10:ST0 X87:2/1(+0/-1)1 CMB:0/1
	ee288b0a	VMUL.F64 D8, D8, D10
0xa51531: D8 C3  FADD ST0, STx
0x52c637fc: 26 emited opcodes, inst=31, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=30 D8:ST0 D9:ST4 D10:ST3 X87:1/1(+0/-0)1 CMB:0/3
	Create and populate x87 Cache for ST3
	e59020ac	LDR r2, [r0, #172]
	e2822002	ADD r2, r2, #0x2
	e2022007	AND r2, r2, #0x7
	e0802182	ADD r2, r0, r2, lsl #3
	ed92ab0b	VLDR D10, [r2, #44]
	-------x87 Cache for ST3
	ee388b0a	VADD.F64 D8, D8, D10
	Purge x87 Cache and Synch Stackcount (+1)---
	e59020b0	LDR r2, [r0, #176]
	e2822001	ADD r2, r2, #0x1
	e58020b0	STR r2, [r0, #176]
	e59020ac	LDR r2, [r0, #172]
	e3003000	MOVW r3, #0x0
	e2801f71	ADD r1, r0, #0x1c4
	e2422001	SUB r2, r2, #0x1
	e2022007	AND r2, r2, #0x7
	e7813102	STR r3, [r1, r2, lsl #2]
	e58020ac	STR r2, [r0, #172]
	e0803182	ADD r3, r0, r2, lsl #3
	ed838b0b	VSTR D8, [r3, #44]
	e2823004	ADD r3, r2, #0x4
	e2033007	AND r3, r3, #0x7
	e0803183	ADD r3, r0, r3, lsl #3
	ed839b0b	VSTR D9, [r3, #44]
	e2823003	ADD r3, r2, #0x3
	e2033007	AND r3, r3, #0x7
	e0803183	ADD r3, r0, r3, lsl #3
	ed83ab0b	VSTR D10, [r3, #44]
	---Purge x87 Cache and Synch Stackcount
0xa51533: E8 08 A8 10 00  CALL Id
0x52c63864: 10 emited opcodes, inst=32, barrier=2 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=31
	e3012538	MOVW r2, #0x1538
	e34020a5	MOVT r2, #0xa5
	e5282004	STR r2, [r8, #-4]!
Jump to next
	e30d2508	MOVW r2, #0xd508
	e3472a39	MOVT r2, #0x7a39
	e30bed40	MOVW LR, #0xbd40
	e340e0b5	MOVT LR, #0xb5
	e5923000	LDR r3, [r2, #0]
	e1a0100e	MOV r1, LR
	e12fff13	BX r3
Reset Caches with 33
0xa51538: F3 0F 10 0D 8C 62 C1 00  MOVSS Gx, Ex
0x52c6388c: 4 emited opcodes, inst=33, barrier=0 state=0/0(0), set=0/0, use=0, need=0/0 sm=0/0 Q4:XMM1
	f3088158	VEOR Q4, Q4, Q4
	e306128c	MOVW r1, #0x628c
	e34010c1	MOVT r1, #0xc1
	ed918a00	VLDR S16, [r1, #0]
0xa51540: 85 C0  TEST Ed, Gd
0x52c6389c: 6 emited opcodes, inst=34, barrier=0 state=3/0(0), set=3F/30, use=0, need=0/30 sm=0/0, pred=13/18/33 Q4:XMM1
	e300e000	MOVW LR, #0x0
	e580e26c	STR LR, [r0, #620]
	e7cbc59f	BFC r12, #11, #1
	e0143004	ANDS r3, r4, r4
	e1a0efa3	LSR LR, r3, #0x1f
	e7c7c39e	BFI r12, LR, #7, #1
0xa51542: 89 44 24 24  MOV Ed, Gd
0x52c638b4: 1 emited opcodes, inst=35, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/0, pred=34 Q4:XMM1
	e5884024	STR r4, [r8, #36]
0xa51546: 7D 04  JGE ib
0x52c638b8: 3 emited opcodes, inst=36, barrier=0 state=0/1(1), set=0/0, use=30, need=30/0 sm=0/1, pred=35, jmp=39 Q4:XMM1
	e02c120c	EOR r1, r12, r12, lsl #4
	e3110b02	TST r1, #0x800
	0a000001	BEQ +3
0xa51548: 33 C0  XOR Gd, Ed
0x52c638c4: 1 emited opcodes, inst=37, barrier=0 state=3/1(1), set=3F/0, use=0, need=0/0 sm=0/1, pred=36 Q4:XMM1
	e0244004	EOR r4, r4, r4
0xa5154a: EB 0A  JMP Ib
0x52c638c8: 1 emited opcodes, inst=38, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=37, jmp=42 Q4:XMM1
	ea00000c	B +14
Reset Caches with 36
0xa5154c: 83 F8 7F  CMP Ed, Ib
0x52c638cc: 8 emited opcodes, inst=39, barrier=0 state=3/1(1), set=3F/38, use=0, need=0/38 sm=0/1, pred=36 Q4:XMM1
	e300207f	MOVW r2, #0x7f
	e0543002	SUBS r3, r4, r2
	e3ccc041	BIC r12, r12, #0x41
	038cc040	ORREQ r12, r12, #0x40
	638ccb02	ORRVS r12, r12, #0x800
	73cccb02	BICVC r12, r12, #0x800
	e1a0efa3	LSR LR, r3, #0x1f
	e7c7c39e	BFI r12, LR, #7, #1
0xa5154f: 7E 09  JLE ib
0x52c638ec: 4 emited opcodes, inst=40, barrier=0 state=0/1(1), set=0/0, use=38, need=38/0 sm=0/1, pred=39, jmp=43 Q4:XMM1
	e02c120c	EOR r1, r12, r12, lsl #4
	e181128c	ORR r1, r1, r12, lsl #5
	e3110b02	TST r1, #0x800
	1a000001	BNE +3
0xa51551: B8 7F 00 00 00  MOV Reg, Id
0x52c638fc: 1 emited opcodes, inst=41, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=40 Q4:XMM1
	e300407f	MOVW r4, #0x7f
0xa51556: 89 44 24 24  MOV Ed, Gd
0x52c63900: 1 emited opcodes, inst=42, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=38/41 Q4:XMM1
	e5884024	STR r4, [r8, #36]
0xa5155a: DB 03  FILD ST0, Ed
0x52c63904: 3 emited opcodes, inst=43, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=20/40/42 Q4:XMM1 D10:ST0 X87:0/1(+1/-0)1
	e5971000	LDR r1, [r7, #0]
	ee001a10	VMOV S0, r1
	eeb8abc0	VCVT.F64.S32 D10, S0
0xa5155c: C7 83 80 02 00 00 02 00 00 00  MOV Ed, Id
0x52c63910: 2 emited opcodes, inst=44, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=43 Q4:XMM1 D10:ST0 X87:1/1(+0/-0)1
	e3003002	MOVW r3, #0x2
	e5873280	STR r3, [r7, #640]
0xa51566: 8B 55 68  MOV Gd, Ed
0x52c63918: 1 emited opcodes, inst=45, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=44 Q4:XMM1 D10:ST0 X87:1/1(+0/-0)1
	e5996068	LDR r6, [r9, #104]
0xa51569: 89 83 84 02 00 00  MOV Ed, Gd
0x52c6391c: 1 emited opcodes, inst=46, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=45 Q4:XMM1 D10:ST0 X87:1/1(+0/-0)1
	e5874284	STR r4, [r7, #644]
0xa5156f: 8B 03  MOV Gd, Ed
0x52c63920: 1 emited opcodes, inst=47, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=46 Q4:XMM1 D10:ST0 X87:1/1(+0/-0)1
	e5974000	LDR r4, [r7, #0]
0xa51571: 85 C0  TEST Ed, Gd
0x52c63924: 4 emited opcodes, inst=48, barrier=0 state=3/1(1), set=3F/30, use=0, need=0/30 sm=0/1, pred=47 Q4:XMM1 D10:ST0 X87:1/1(+0/-0)1
	e7cbc59f	BFC r12, #11, #1
	e0143004	ANDS r3, r4, r4
	e1a0efa3	LSR LR, r3, #0x1f
	e7c7c39e	BFI r12, LR, #7, #1
0xa51573: 89 93 90 02 00 00  MOV Ed, Gd
0x52c63934: 1 emited opcodes, inst=49, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=48 Q4:XMM1 D10:ST0 X87:1/1(+0/-0)1
	e5876290	STR r6, [r7, #656]
0xa51579: 7D 06  JGE ib
0x52c63938: 3 emited opcodes, inst=50, barrier=0 state=0/1(1), set=0/0, use=30, need=30/0 sm=0/1, pred=49, jmp=52 Q4:XMM1 D10:ST0 X87:1/1(+0/-0)1
	e02c120c	EOR r1, r12, r12, lsl #4
	e3110b02	TST r1, #0x800
	0a000004	BEQ +6
0xa5157b: D8 05 40 62 C1 00  FADD ST0, float[ED]
0x52c63944: 5 emited opcodes, inst=51, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=50 Q4:XMM1 D10:ST0 X87:1/1(+0/-0)1
	e3062240	MOVW r2, #0x6240
	e34020c1	MOVT r2, #0xc1
	ed920a00	VLDR S0, [r2, #0]
	eeb71ac0	VCVT.F64.F32 D1, S0
	ee3aab01	VADD.F64 D10, D10, D1
0xa51581: D8 CA  FMUL ST0, STx
0x52c63958: 6 emited opcodes, inst=52, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=50/51 Q4:XMM1 D10:ST0 D11:ST2 X87:1/1(+0/-0)1 CMB:0/2
	Create and populate x87 Cache for ST2
	e59020ac	LDR r2, [r0, #172]
	e2822001	ADD r2, r2, #0x1
	e2022007	AND r2, r2, #0x7
	e0802182	ADD r2, r0, r2, lsl #3
	ed92bb0b	VLDR D11, [r2, #44]
	-------x87 Cache for ST2
	ee2aab0b	VMUL.F64 D10, D10, D11
0xa51583: 8B C2  MOV Gd, Ed
0x52c63970: 1 emited opcodes, inst=53, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=52 Q4:XMM1 D10:ST0 D11:ST2 X87:1/1(+0/-0)1
	e1a04006	MOV r4, r6
0xa51585: 85 C0  TEST Ed, Gd
0x52c63974: 3 emited opcodes, inst=54, barrier=0 state=3/1(1), set=3F/8, use=0, need=0/8 sm=0/0, pred=53 Q4:XMM1 D10:ST0 D11:ST2 X87:1/1(+0/-0)1
	e3ccc041	BIC r12, r12, #0x41
	e0143004	ANDS r3, r4, r4
	038cc040	ORREQ r12, r12, #0x40
0xa51587: D9 93 88 02 00 00  FST float[ED], ST0
0x52c63980: 3 emited opcodes, inst=55, barrier=0 state=0/1(1), set=0/0, use=0, need=8/8 sm=0/0, pred=54 Q4:XMM1 D10:ST0 D11:ST2 X87:1/1(+0/-0)1
	eeb70bca	VCVT.F32.F64 S0, D10
	ee102a10	VMOV r2, S0
	e5872288	STR r2, [r7, #648]
0xa5158d: 75 0F  JNZ ib
0x52c6398c: 2 emited opcodes, inst=56, barrier=0 state=0/1(1), set=0/0, use=8, need=8/0 sm=0/0, pred=55, jmp=60 Q4:XMM1 D10:ST0 D11:ST2 X87:1/1(+0/-0)1
	e31c0040	TST r12, #0x40
	0a00000f	BEQ +17
0xa5158f: F3 0F 10 05 84 12 BA 00  MOVSS Gx, Ex
0x52c63994: 4 emited opcodes, inst=57, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=56 Q4:XMM1 D10:ST0 D11:ST2 Q6:XMM0 X87:1/1(+0/-0)1
	f30cc15c	VEOR Q6, Q6, Q6
	e3011284	MOVW r1, #0x1284
	e34010ba	MOVT r1, #0xba
	ed91ca00	VLDR S24, [r1, #0]
0xa51597: DD D8  FSTP ST0, ST0
0x52c639a4: 0 emited opcodes, inst=58, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=57 Q4:XMM1 D10:ST0 D11:ST2 Q6:XMM0 X87:1/0(+0/-1)0
0xa51599: E9 98 00 00 00  JMP Id
0x52c639a4: 12 emited opcodes, inst=59, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=58, jmp=102 Q4:XMM1 D11:ST1 Q6:XMM0
	Cache Transform ---- ninst=59 -> 102
	  - Swaping 0 <-> 3
	f3b2804b	VSWP Q4, !!!
	  - Moving away 2/3
	f22ae15a	VMOV Q7, Q5
	  - Loading ST0
	e59030ac	LDR r3, [r0, #172]
	e0802183	ADD r2, r0, r3, lsl #3
	ed92ab0b	VLDR D10, [r2, #44]
	  - Swaping 4 <-> 1
	f3b2c049	VSWP Q6, !!!
	  - Swaping 4 <-> 2
	f3b2c04a	VSWP Q6, Q5
	  - Swaping 6 <-> 1
	f3b2e049	VSWP Q7, !!!
	  - Refreh XMM1
	e2801f7d	ADD r1, r0, #0x1f4
	f401ea8d	VST1.32 {D14, D15}, [r1]!
	  - Swaping 6 <-> 2
	f3b2e04a	VSWP Q7, Q5
	---- Cache Transform
	ea000082	B +132
Reset Caches with 56
0xa5159e: 85 C0  TEST Ed, Gd
0x52c639d4: 4 emited opcodes, inst=60, barrier=0 state=3/1(1), set=3F/30, use=0, need=0/30 sm=0/0, pred=56 Q4:XMM1 D10:ST0 D11:ST2 X87:1/1(+0/-0)1
	e7cbc59f	BFC r12, #11, #1
	e0143004	ANDS r3, r4, r4
	e1a0efa3	LSR LR, r3, #0x1f
	e7c7c39e	BFI r12, LR, #7, #1
0xa515a0: DB 44 24 24  FILD ST0, Ed
0x52c639e4: 3 emited opcodes, inst=61, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/0, pred=60 Q4:XMM1 D10:ST1 D11:ST3 D12:ST0 X87:1/2(+1/-0)2
	e5981024	LDR r1, [r8, #36]
	ee001a10	VMOV S0, r1
	eeb8cbc0	VCVT.F64.S32 D12, S0
0xa515a4: 89 44 24 24  MOV Ed, Gd
0x52c639f0: 1 emited opcodes, inst=62, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/0, pred=61 Q4:XMM1 D10:ST1 D11:ST3 D12:ST0 X87:2/2(+0/-0)2
	e5884024	STR r4, [r8, #36]
0xa515a8: D8 CB  FMUL ST0, STx
0x52c639f4: 1 emited opcodes, inst=63, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=62 Q4:XMM1 D10:ST1 D11:ST3 D12:ST0 X87:2/2(+0/-0)2 CMB:0/3
	ee2ccb0b	VMUL.F64 D12, D12, D11
0xa515aa: DE E1  FSUBRP STx, ST0
0x52c639f8: 1 emited opcodes, inst=64, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=63 Q4:XMM1 D10:ST1 D11:ST3 D12:ST0 X87:2/1(+0/-1)1 CMB:0/1
	ee3cab4a	VSUB.F64 D10, D12, D10
0xa515ac: DB 44 24 24  FILD ST0, Ed
0x52c639fc: 3 emited opcodes, inst=65, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=64 Q4:XMM1 D10:ST1 D11:ST3 D12:ST0 X87:1/2(+1/-0)2
	e5981024	LDR r1, [r8, #36]
	ee001a10	VMOV S0, r1
	eeb8cbc0	VCVT.F64.S32 D12, S0
0xa515b0: 7D 06  JGE ib
0x52c63a08: 3 emited opcodes, inst=66, barrier=0 state=0/1(1), set=0/0, use=30, need=30/0 sm=0/1, pred=65, jmp=68 Q4:XMM1 D10:ST1 D11:ST3 D12:ST0 X87:2/2(+0/-0)2
	e02c120c	EOR r1, r12, r12, lsl #4
	e3110b02	TST r1, #0x800
	0a000004	BEQ +6
0xa515b2: D8 05 40 62 C1 00  FADD ST0, float[ED]
0x52c63a14: 5 emited opcodes, inst=67, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=66 Q4:XMM1 D10:ST1 D11:ST3 D12:ST0 X87:2/2(+0/-0)2
	e3062240	MOVW r2, #0x6240
	e34020c1	MOVT r2, #0xc1
	ed920a00	VLDR S0, [r2, #0]
	eeb71ac0	VCVT.F64.F32 D1, S0
	ee3ccb01	VADD.F64 D12, D12, D1
0xa515b8: DE F9  FDIVP STx, ST0
0x52c63a28: 1 emited opcodes, inst=68, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=66/67 Q4:XMM1 D10:ST1 D11:ST3 D12:ST0 X87:2/1(+0/-1)1 CMB:0/1
	ee8aab0c	VDIV.F64 D10, D10, D12
0xa515ba: D9 5C 24 24  FSTP float[ED], ST0
0x52c63a2c: 3 emited opcodes, inst=69, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=68 Q4:XMM1 D10:ST0 D11:ST2 X87:1/0(+0/-1)0
	eeb70bca	VCVT.F32.F64 S0, D10
	ee102a10	VMOV r2, S0
	e5882024	STR r2, [r8, #36]
0xa515be: F3 0F 10 44 24 24  MOVSS Gx, Ex
0x52c63a38: 3 emited opcodes, inst=70, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=69 Q4:XMM1 D11:ST1 Q6:XMM0
	e5982024	LDR r2, [r8, #36]
	f30cc15c	VEOR Q6, Q6, Q6
	ee0c2b10	VMOV.32 D12[0], r2
0xa515c4: EB 70  JMP Ib
0x52c63a44: 12 emited opcodes, inst=71, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=70, jmp=102 Q4:XMM1 D11:ST1 Q6:XMM0
	Cache Transform ---- ninst=71 -> 102
	  - Swaping 0 <-> 3
	f3b2804b	VSWP Q4, !!!
	  - Moving away 2/3
	f22ae15a	VMOV Q7, Q5
	  - Loading ST0
	e59030ac	LDR r3, [r0, #172]
	e0802183	ADD r2, r0, r3, lsl #3
	ed92ab0b	VLDR D10, [r2, #44]
	  - Swaping 4 <-> 1
	f3b2c049	VSWP Q6, !!!
	  - Swaping 4 <-> 2
	f3b2c04a	VSWP Q6, Q5
	  - Swaping 6 <-> 1
	f3b2e049	VSWP Q7, !!!
	  - Refreh XMM1
	e2801f7d	ADD r1, r0, #0x1f4
	f401ea8d	VST1.32 {D14, D15}, [r1]!
	  - Swaping 6 <-> 2
	f3b2e04a	VSWP Q7, Q5
	---- Cache Transform
	ea00005a	B +92
Reset Caches with 4
0xa515c6: 8B 13  MOV Gd, Ed
0x52c63a74: 1 emited opcodes, inst=72, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=4
	e5976000	LDR r6, [r7, #0]
0xa515c8: DB 03  FILD ST0, Ed
0x52c63a78: 3 emited opcodes, inst=73, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=72 D8:ST0 X87:0/1(+1/-0)1
	e5971000	LDR r1, [r7, #0]
	ee001a10	VMOV S0, r1
	eeb88bc0	VCVT.F64.S32 D8, S0
0xa515ca: 85 D2  TEST Ed, Gd
0x52c63a84: 4 emited opcodes, inst=74, barrier=0 state=3/1(1), set=3F/30, use=0, need=0/30 sm=0/0, pred=73 D8:ST0 X87:1/1(+0/-0)1
	e7cbc59f	BFC r12, #11, #1
	e0163006	ANDS r3, r6, r6
	e1a0efa3	LSR LR, r3, #0x1f
	e7c7c39e	BFI r12, LR, #7, #1
0xa515cc: C7 83 80 02 00 00 03 00 00 00  MOV Ed, Id
0x52c63a94: 2 emited opcodes, inst=75, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/0, pred=74 D8:ST0 X87:1/1(+0/-0)1
	e3003003	MOVW r3, #0x3
	e5873280	STR r3, [r7, #640]
0xa515d6: 8B 4D 68  MOV Gd, Ed
0x52c63a9c: 1 emited opcodes, inst=76, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=75 D8:ST0 X87:1/1(+0/-0)1
	e5995068	LDR r5, [r9, #104]
0xa515d9: 89 8B 90 02 00 00  MOV Ed, Gd
0x52c63aa0: 1 emited opcodes, inst=77, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=76 D8:ST0 X87:1/1(+0/-0)1
	e5875290	STR r5, [r7, #656]
0xa515df: C7 83 84 02 00 00 00 00 00 00  MOV Ed, Id
0x52c63aa4: 2 emited opcodes, inst=78, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/1, pred=77 D8:ST0 X87:1/1(+0/-0)1
	e3003000	MOVW r3, #0x0
	e5873284	STR r3, [r7, #644]
0xa515e9: 7D 06  JGE ib
0x52c63aac: 3 emited opcodes, inst=79, barrier=0 state=0/1(1), set=0/0, use=30, need=30/0 sm=0/1, pred=78, jmp=81 D8:ST0 X87:1/1(+0/-0)1
	e02c120c	EOR r1, r12, r12, lsl #4
	e3110b02	TST r1, #0x800
	0a000004	BEQ +6
0xa515eb: D8 05 40 62 C1 00  FADD ST0, float[ED]
0x52c63ab8: 5 emited opcodes, inst=80, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/1, pred=79 D8:ST0 X87:1/1(+0/-0)1
	e3062240	MOVW r2, #0x6240
	e34020c1	MOVT r2, #0xc1
	ed920a00	VLDR S0, [r2, #0]
	eeb71ac0	VCVT.F64.F32 D1, S0
	ee388b01	VADD.F64 D8, D8, D1
0xa515f1: D8 CA  FMUL ST0, STx
0x52c63acc: 6 emited opcodes, inst=81, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=79/80 D8:ST0 D9:ST2 X87:1/1(+0/-0)1 CMB:0/2
	Create and populate x87 Cache for ST2
	e59020ac	LDR r2, [r0, #172]
	e2822001	ADD r2, r2, #0x1
	e2022007	AND r2, r2, #0x7
	e0802182	ADD r2, r0, r2, lsl #3
	ed929b0b	VLDR D9, [r2, #44]
	-------x87 Cache for ST2
	ee288b09	VMUL.F64 D8, D8, D9
0xa515f3: 8B C1  MOV Gd, Ed
0x52c63ae4: 1 emited opcodes, inst=82, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=81 D8:ST0 D9:ST2 X87:1/1(+0/-0)1
	e1a04005	MOV r4, r5
0xa515f5: 85 C0  TEST Ed, Gd
0x52c63ae8: 4 emited opcodes, inst=83, barrier=0 state=3/1(1), set=3F/30, use=0, need=0/30 sm=0/0, pred=82 D8:ST0 D9:ST2 X87:1/1(+0/-0)1
	e7cbc59f	BFC r12, #11, #1
	e0143004	ANDS r3, r4, r4
	e1a0efa3	LSR LR, r3, #0x1f
	e7c7c39e	BFI r12, LR, #7, #1
0xa515f7: D9 54 24 24  FST float[ED], ST0
0x52c63af8: 3 emited opcodes, inst=84, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/0, pred=83 D8:ST0 D9:ST2 X87:1/1(+0/-0)1
	eeb70bc8	VCVT.F32.F64 S0, D8
	ee102a10	VMOV r2, S0
	e5882024	STR r2, [r8, #36]
0xa515fb: D9 9B 88 02 00 00  FSTP float[ED], ST0
0x52c63b04: 3 emited opcodes, inst=85, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/0, pred=84 D8:ST0 D9:ST2 X87:1/0(+0/-1)0
	eeb70bc8	VCVT.F32.F64 S0, D8
	ee102a10	VMOV r2, S0
	e5872288	STR r2, [r7, #648]
0xa51601: DB 83 90 02 00 00  FILD ST0, Ed
0x52c63b10: 3 emited opcodes, inst=86, barrier=0 state=0/1(1), set=0/0, use=0, need=30/30 sm=0/0, pred=85 D8:ST0 D9:ST2 X87:0/1(+1/-0)1
	e5971290	LDR r1, [r7, #656]
	ee001a10	VMOV S0, r1
	eeb88bc0	VCVT.F64.S32 D8, S0
0xa51607: 7D 06  JGE ib
0x52c63b1c: 3 emited opcodes, inst=87, barrier=0 state=0/1(1), set=0/0, use=30, need=30/0 sm=0/0, pred=86, jmp=89 D8:ST0 D9:ST2 X87:1/1(+0/-0)1
	e02c120c	EOR r1, r12, r12, lsl #4
	e3110b02	TST r1, #0x800
	0a000004	BEQ +6
0xa51609: D8 05 40 62 C1 00  FADD ST0, float[ED]
0x52c63b28: 5 emited opcodes, inst=88, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=87 D8:ST0 D9:ST2 X87:1/1(+0/-0)1
	e3062240	MOVW r2, #0x6240
	e34020c1	MOVT r2, #0xc1
	ed920a00	VLDR S0, [r2, #0]
	eeb71ac0	VCVT.F64.F32 D1, S0
	ee388b01	VADD.F64 D8, D8, D1
0xa5160f: D9 54 24 14  FST float[ED], ST0
0x52c63b3c: 3 emited opcodes, inst=89, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=87/88 D8:ST0 D9:ST2 X87:1/1(+0/-0)1
	eeb70bc8	VCVT.F32.F64 S0, D8
	ee102a10	VMOV r2, S0
	e5882014	STR r2, [r8, #20]
0xa51613: D9 C1  FLD STx
0x52c63b48: 4 emited opcodes, inst=90, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=89 D8:ST1 D9:ST3 D10:ST0 D11:ST2 X87:1/2(+1/-0)2 CMB:0/2
	Create and populate x87 Cache for ST2
	e59020ac	LDR r2, [r0, #172]
	e0802182	ADD r2, r0, r2, lsl #3
	ed92bb0b	VLDR D11, [r2, #44]
	-------x87 Cache for ST2
	eeb0ab4b	VMOV.F64 D10, D11
0xa51615: D9 C9  FXCH STx
0x52c63b58: 0 emited opcodes, inst=91, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=90 D8:ST0 D9:ST3 D10:ST1 D11:ST2 X87:2/2(+0/-0)2 SWP:0/1
0xa51617: DF E9  FUCOMIP ST0, STx
0x52c63b58: 7 emited opcodes, inst=92, barrier=0 state=1/1(1), set=3F/1F, use=0, need=0/1F sm=0/0, pred=91 D8:ST0 D9:ST3 D10:ST1 D11:ST2 X87:2/1(+0/-1)1 CMB:0/1
	eeb48b4a	VCMP.F64 D8, D10
	eef1fa10	VMRS APSR_nzcv, FPSCR
	e3ccc045	BIC r12, r12, #0x45
	638cc045	ORRVS r12, r12, #0x45
	038cc040	ORREQ r12, r12, #0x40
	438cc001	ORRMI r12, r12, #0x1
	e3ccce89	BIC r12, r12, #0x890
0xa51619: DD D8  FSTP ST0, ST0
0x52c63b74: 0 emited opcodes, inst=93, barrier=0 state=0/1(1), set=0/0, use=0, need=1F/1F sm=0/0, pred=92 D9:ST2 D10:ST0 D11:ST1 X87:1/0(+0/-1)0
0xa5161b: 9F  LAHF
0x52c63b74: 1 emited opcodes, inst=94, barrier=0 state=0/1(1), set=0/0, use=1F, need=1F/0 sm=0/0, pred=93 D9:ST1 D11:ST0
	e7cf441c	BFI r4, r12, #8, #8
0xa5161c: F6 C4 44  TEST Eb, Ib
0x52c63b78: 10 emited opcodes, inst=95, barrier=0 state=3/1(1), set=3F/2, use=0, need=0/2 sm=0/0, pred=94 D9:ST1 D11:ST0
	e6ef1474	UXTB r1, r4 ror 8}
	e3002044	MOVW r2, #0x44
	e0113002	ANDS r3, r1, r2
	e20320e0	AND r2, r3, #0xe0
	e300e9e0	MOVW LR, #0x9e0
	e346e310	MOVT LR, #0x6310
	e79ee1a2	LDR LR, [LR, r2, lsr #3]
	e203301f	AND r3, r3, #0x1f
	e1e0e33e	MVN LR, LR, lsr r3
	e7c2c11e	BFI r12, LR, #2, #1
0xa5161f: 7A 05  JP ib
0x52c63ba0: 2 emited opcodes, inst=96, barrier=0 state=0/1(1), set=0/0, use=2, need=2/0 sm=0/0, pred=95, jmp=99 D9:ST1 D11:ST0
	e31c0004	TST r12, #0x4
	1a000004	BNE +6
0xa51621: 0F 28 C1  MOVAPS Gx,Ex
0x52c63ba8: 3 emited opcodes, inst=97, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=96 D9:ST1 D11:ST0 Q6:xmm1 Q7:XMM0
	e2801f7d	ADD r1, r0, #0x1f4
	f421ca8f	VLD1.32 {D12, D13}, [r1]
	f22ce15c	VMOV Q7, Q6
0xa51624: EB 10  JMP Ib
0x52c63bb4: 2 emited opcodes, inst=98, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=97, jmp=102 D9:ST1 D11:ST0 Q6:xmm1 Q7:XMM0
	Cache Transform ---- ninst=98 -> 102
	  - Swaping 4 <-> 6
	f3b2c04e	VSWP Q6, Q7
	---- Cache Transform
	ea000008	B +10
Reset Caches with 96
0xa51626: F3 0F 10 44 24 24  MOVSS Gx, Ex
0x52c63bbc: 3 emited opcodes, inst=99, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=96 D9:ST1 D11:ST0 Q6:XMM0
	e5982024	LDR r2, [r8, #36]
	f30cc15c	VEOR Q6, Q6, Q6
	ee0c2b10	VMOV.32 D12[0], r2
0xa5162c: F3 0F 5E 44 24 14  DIVSS Gx, Ex
0x52c63bc8: 3 emited opcodes, inst=100, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=99 D9:ST1 D11:ST0 Q6:XMM0
	e5981014	LDR r1, [r8, #20]
	ee001a10	VMOV S0, r1
	ee8cca00	VDIV.F32 S24, S24, S0
0xa51632: F3 0F 59 C1  MULSS Gx, Ex
0x52c63bd4: 3 emited opcodes, inst=101, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=100 D9:ST1 D11:ST0 Q6:XMM0 Q7:xmm1
	e2801f7d	ADD r1, r0, #0x1f4
	f421ea8f	VLD1.32 {D14, D15}, [r1]
	ee2cca0e	VMUL.F32 S24, S24, S28
0xa51636: F3 0F 11 83 8C 02 00 00  MOVSS Ex, Gx
0x52c63be0: 2 emited opcodes, inst=102, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=59/71/98/101 D9:ST1 D11:ST0 Q6:XMM0 Q7:xmm1
	ee1c2b10	VMOV.S32 r2, D12[0]
	e587228c	STR r2, [r7, #652]
0xa5163e: 8B 44 24 10  MOV Gd, Ed
0x52c63be8: 1 emited opcodes, inst=103, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=1/5/7/102 D9:ST1 D11:ST0 Q6:XMM0 Q7:xmm1
	e5984010	LDR r4, [r8, #16]
0xa51642: 8B 4C 24 1C  MOV Gd, Ed
0x52c63bec: 1 emited opcodes, inst=104, barrier=0 state=0/1(1), set=0/0, use=0, need=0/0 sm=0/0, pred=103 D9:ST1 D11:ST0 Q6:XMM0 Q7:xmm1
	e598501c	LDR r5, [r8, #28]
0xa51646: 83 C0 01  ADD Ed, Ib
0x52c63bf0: 1 emited opcodes, inst=105, barrier=0 state=3/1(1), set=3F/0, use=0, need=0/0 sm=0/0, pred=104 D9:ST1 D11:ST0 Q6:XMM0 Q7:xmm1
	e2844001	ADD r4, r4, #0x1
0xa51649: 81 C3 C0 07 00 00  ADD Ed, Id
0x52c63bf4: 2 emited opcodes, inst=106, barrier=0 state=3/1(1), set=3F/0, use=0, need=0/0 sm=0/0, pred=105 D9:ST1 D11:ST0 Q6:XMM0 Q7:xmm1
	e30037c0	MOVW r3, #0x7c0
	e0877003	ADD r7, r7, r3
0xa5164f: 3B 81 68 CC 03 00  CMP Gd, Ed
0x52c63bfc: 12 emited opcodes, inst=107, barrier=0 state=3/1(1), set=3F/81, use=0, need=0/81 sm=0/0, pred=106 D9:ST1 D11:ST0 Q6:XMM0 Q7:xmm1
	e30c1c68	MOVW r1, #0xcc68
	e3401003	MOVT r1, #0x3
	e0851001	ADD r1, r5, r1
	e5912000	LDR r2, [r1, #0]
	e5804270	STR r4, [r0, #624]
	e5802274	STR r2, [r0, #628]
	e300e02a	MOVW LR, #0x2a
	e580e26c	STR LR, [r0, #620]
	e0543002	SUBS r3, r4, r2
	e5803278	STR r3, [r0, #632]
	e3ccc041	BIC r12, r12, #0x41
	338cc001	ORRCC r12, r12, #0x1
0xa51655: 89 44 24 10  MOV Ed, Gd
0x52c63c2c: 1 emited opcodes, inst=108, barrier=0 state=0/3(0), set=0/0, use=0, need=81/81 sm=0/0, pred=107 D9:ST1 D11:ST0 Q6:XMM0 Q7:xmm1
	e5884010	STR r4, [r8, #16]
0xa51659: 0F 82 47 FE FF FF  JC id
0x52c63c30: 18 emited opcodes, inst=109, barrier=0 state=0/3(0), set=0/0, use=1, need=81/80 sm=0/1, pred=108, jmp=out D9:ST1 D11:ST0 Q6:XMM0 Q7:xmm1
	e31c0001	TST r12, #0x1
	0a00000f	BEQ +17
	Purge locally x87 Cache and Synch Stackcount (+0)---
	e59020ac	LDR r2, [r0, #172]
	e2823001	ADD r3, r2, #0x1
	e2033007	AND r3, r3, #0x7
	e0803183	ADD r3, r0, r3, lsl #3
	ed839b0b	VSTR D9, [r3, #44]
	e0803182	ADD r3, r0, r2, lsl #3
	ed83bb0b	VSTR D11, [r3, #44]
	---Purge x87 Cache and Synch Stackcount
	Purge locally SSE Cache ------
	e2801f79	ADD r1, r0, #0x1e4
	f401ca8d	VST1.32 {D12, D13}, [r1]!
	------ Purge SSE Cache
Jump to next
	e30422a0	MOVW r2, #0x42a0
	e3472926	MOVT r2, #0x7926
	e301e4a6	MOVW LR, #0x14a6
	e340e0a5	MOVT LR, #0xa5
	e5923000	LDR r3, [r2, #0]
	e1a0100e	MOV r1, LR
	e12fff13	BX r3
0xa5165f: DD D9  FSTP ST0, STx
0x52c63c78: 0 emited opcodes, inst=110, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=109 D9:ST0 D11:ST1 Q6:XMM0 Q7:xmm1 X87:0/-1(+0/-1)-1 SWP:0/1
0xa51661: 5F  POP reg
0x52c63c78: 1 emited opcodes, inst=111, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=110 D11:ST0 Q6:XMM0 Q7:xmm1 X87:-1/-1(+0/-0)-1
	e498b004	LDR r11, [r8], #4
0xa51662: DD D8  FSTP ST0, ST0
0x52c63c7c: 0 emited opcodes, inst=112, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=111 D11:ST0 Q6:XMM0 Q7:xmm1 X87:-1/-2(+0/-1)-2
0xa51664: 5E  POP reg
0x52c63c7c: 1 emited opcodes, inst=113, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=112 Q6:XMM0 Q7:xmm1 X87:-2/-2(+0/-0)-2
	e498a004	LDR r10, [r8], #4
0xa51665: DD D9  FSTP ST0, STx
0x52c63c80: 10 emited opcodes, inst=114, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=113 D8:ST0 D9:ST1 Q6:XMM0 Q7:xmm1 X87:-2/-3(+0/-1)-3 SWP:0/1
	Create and populate x87 Cache for ST1
	e59020ac	LDR r2, [r0, #172]
	e2822003	ADD r2, r2, #0x3
	e2022007	AND r2, r2, #0x7
	e0802182	ADD r2, r0, r2, lsl #3
	ed928b0b	VLDR D8, [r2, #44]
	-------x87 Cache for ST1
	Create and populate x87 Cache for ST0
	e59020ac	LDR r2, [r0, #172]
	e2822002	ADD r2, r2, #0x2
	e2022007	AND r2, r2, #0x7
	e0802182	ADD r2, r0, r2, lsl #3
	ed929b0b	VLDR D9, [r2, #44]
	-------x87 Cache for ST0
0xa51667: DD D8  FSTP ST0, ST0
0x52c63ca8: 0 emited opcodes, inst=115, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=114 D9:ST0 Q6:XMM0 Q7:xmm1 X87:-3/-4(+0/-1)-4
0xa51669: 5D  POP reg
0x52c63ca8: 1 emited opcodes, inst=116, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=115 Q6:XMM0 Q7:xmm1 X87:-4/-4(+0/-0)-4
	e4989004	LDR r9, [r8], #4
0xa5166a: 5B  POP reg
0x52c63cac: 1 emited opcodes, inst=117, barrier=0 state=0/3(0), set=0/0, use=0, need=0/0 sm=0/0, pred=116 Q6:XMM0 Q7:xmm1 X87:-4/-4(+0/-0)-4
	e4987004	LDR r7, [r8], #4
0xa5166b: 83 C4 08  ADD Ed, Ib
0x52c63cb0: 22 emited opcodes, inst=118, barrier=0 state=3/3(0), set=3F/80, use=0, need=0/80 sm=0/0, pred=117 Q6:XMM0 Q7:xmm1 X87:-4/-4(+0/-0)-4
	e2888008	ADD r8, r8, #0x8
	Purge x87 Cache and Synch Stackcount (-4)---
	e59020b0	LDR r2, [r0, #176]
	e2422004	SUB r2, r2, #0x4
	e58020b0	STR r2, [r0, #176]
	e59020ac	LDR r2, [r0, #172]
	e3003003	MOVW r3, #0x3
	e2801f71	ADD r1, r0, #0x1c4
	e7813102	STR r3, [r1, r2, lsl #2]
	e2822001	ADD r2, r2, #0x1
	e2022007	AND r2, r2, #0x7
	e7813102	STR r3, [r1, r2, lsl #2]
	e2822001	ADD r2, r2, #0x1
	e2022007	AND r2, r2, #0x7
	e7813102	STR r3, [r1, r2, lsl #2]
	e2822001	ADD r2, r2, #0x1
	e2022007	AND r2, r2, #0x7
	e7813102	STR r3, [r1, r2, lsl #2]
	e2822001	ADD r2, r2, #0x1
	e2022007	AND r2, r2, #0x7
	e58020ac	STR r2, [r0, #172]
	---Purge x87 Cache and Synch Stackcount
	Purge SSE Cache ------
	e2801f79	ADD r1, r0, #0x1e4
	f401ca8d	VST1.32 {D12, D13}, [r1]!
	------ Purge SSE Cache
0xa5166e: C2 14 00  RETN
0x52c63d08: 10 emited opcodes, inst=119, barrier=2 state=0/3(0), set=0/0, use=80, need=80/0 sm=0/0, pred=118
Retn epilog
	e498e004	LDR LR, [r8], #4
	e2888014	ADD r8, r8, #0x14
	e3012398	MOVW r2, #0x1398
	e3462334	MOVT r2, #0x6334
	e1a0382e	LSR r3, LR, #0x10
	e7922103	LDR r2, [r2, r3, lsl #2]
	e7ef305e	UBFX r3, LR, #0, #16
	e7923103	LDR r3, [r2, r3, lsl #2]
	e1a0100e	MOV r1, LR
	e12fff13	BX r3

@ptitSeb
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ptitSeb commented Mar 18, 2023

That's it! I have what I need to work on th ebug now. Thanks.

ptitSeb added a commit that referenced this issue Mar 18, 2023
@ptitSeb
[DYNAREC] Fixed a type in a SSE2 helper function (should help #789, p…
4a88ff3 
…robably others too)
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ptitSeb commented Mar 18, 2023

Ok, I found something, and pushed a fix. Can you update box86 and try again?

ptitSeb added a commit that referenced this issue Mar 18, 2023
@ptitSeb
[DYNAREC] Roolback previous commit and do a better one (still for #789,…
58426cb 
… probably others too)
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ptitSeb commented Mar 18, 2023

So, My previous fix was not good at all. But this one should be better. If you can try again.

@Pipetto-crypto
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Nope, just tried and still crashes with the same error

ptitSeb added a commit that referenced this issue Mar 19, 2023
@ptitSeb
[DYNAREC] Fixed a potential issue when Neon Cache is converted and co…
b3b55d2 
…ntains both single and double (quad) elements (for #789)
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ptitSeb commented Mar 19, 2023

Ok, I have fixed it. I have it running fine on DX9 (with Gallium9)

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Can confirm it is fixed

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