3.0.0.dev0 with RAL UVM Register Access Layer
Pre-release
Pre-release
The UVM Register Access Layer (RAL) comes to pyuvm
pyuvm as I originally wrote it did not support the UVM Register Access Layer. Fortunately our wonderful contributors especially @EngRaff92 and @crteja took a leadership role in bringing RAL to pyuvm. This dev release is the first release of that work.
pyuvm* 3.0.0 will be the first RAL release. Before we make the release official, I am releasing this dev release so that people can try out the new technology.
Thank you to everyone who contributed to pyuvm 3.0.0.dev0!
Details and names are below.
What's Changed
- Automatic string conversion for log messages by @timothyscherer in #148
- Update example TinyALY to work with Verilator 5 by @teja-91 in #145
- Add support for uvm_transaction simulation time recording by @teja-91 in #153
- Replace fork with start_soon in example by @crteja in #155
- Add implementation for chapter 17 by @crteja in #154
- Update uvm_reg_map implementation by @crteja in #157
- Rationalized testing using tox by @raysalemi in #159
- Use 1800.2 naming convention for all base classes by @crteja in #162
- Enable CI for ral_dev by @crteja in #164
- TinyALU reg block implementation by @crteja in #166
- PR branch to main shared ral_dev branch push by @EngRaff92 in #168
- Ral dev by @EngRaff92 in #169
- Add the changes from PR 170 by @raysalemi in #171
- Generate passthrough interface by @crteja in #172
- Regenerate reg block using peakrdl-verilog by @crteja in #173
- Fix #160, replace all cocotb.fork() with cocotb.start_soon() in all tests by @MehanathanS in #175
- Fix Typo mentioned in #121 by @MehanathanS in #176
- Add default argument to ConfigDB().get() by @timothyscherer in #178
- Latest ral_dev update by @EngRaff92 in #186
- Add RAL to pyuvm. This is the primary 3.0 feature by @raysalemi in #194
New Contributors
- @timothyscherer made their first contribution in #148
- @teja-91 made their first contribution in #145
- @crteja made their first contribution in #155
- @EngRaff92 made their first contribution in #168
- @MehanathanS made their first contribution in #175
Full Changelog: 2.9.1...3.0.0.dev0