Bring digital simulation back to Qucs-S

[ra3xdh]

The Ngspice team is currently developing the support for U devices from PSPICE representing digital blocks. This feature is expected in Ngspice-38 release. The support for U devices makes possible to bring the digital components back to Qucs-S. Currently digital devices are hidden as SPICE-incompatible.
Holger @holvo , please let me know, when the U-devices will be ready to start its implementation in Qucs-S GUI.

TODO list in order to revert digital simulation for Qucs-S

• Add XSPICE logic gates models
• Add XSPICE flip-flop models
• Add SPICE entries for digital sources in analog mode
• Revert optional fully digital simulation mode using iverilog
• Backport qucsveri script from the Qucs-0.0.20-rc1. This script is needed to start the iverilog
• Backport qucsconv utility that is needed to convert VCD files to Qucs XML dataset
• Revert hidden digital devices to components panel
• Fix remaining issues with default delay time and show netlist mentioned in Bring back digital modeling #272
• Add tutorial section on digital simulation; old Qucs tutorial is not valid anymore

[ra3xdh]

I have started the implementation of the digital devices based on the recent Ngspice-38. Two devices are back: ideal inverter and NAND gate. The manual build of the Ngspice from pre-master branch is required. Everything seems to work as expected. I have pushed the code to the digital branch https://github.com/ra3xdh/qucs_s/tree/digital The attached screenshot illustrates the operation of the RC-generator based on logical gates.

[ra3xdh]

The trigger devices were added by #262 Here is frequency divider example involving D-trigger device.

[ra3xdh]

I have added a TODO list for this issue.

[ra3xdh]

SPICE entry for digital source in analog mode was added by #265

[ra3xdh]

I have faced a problem during backporting qucsconv from Qucs latest RC. This utility depends on qucsator and libqucs.so. Also it shares a large part of the code with qucsator. It makes the adding of qucsconv much more difficult that expected.

[ra3xdh]

I have failed to make a full backport of the qucsconv tool, because it depends on almost half of Qucs-S code. I had to restrict only to VCD files support and renamed the utility to vcd2qucsdat. I also renamed the wrapper scripts to avoid name conflict with old Qucs package. The new names for the wrapper scripts are:

qucsdigilib => qucs_mkdigilib
qucsdigi => qucs_run_hdl
qucsveri => qucs_run_verilog

The code is available here: https://github.com/ra3xdh/qucs_s/tree/revert_qucsconv_qucsdigi I will merge everything to the current branch once @Radvall finishes work on revert digital devices to Qucs-S GUI.

[ra3xdh]

The #272 implements the digital simulation mode using Verilog/VHDL. The remaining tasks are to revert hidden digital devices in the components panel and fix small issues found during testing of #272. I have updated the TODO list.

[ra3xdh]

I have made the hidden digital devices visible again.

[ra3xdh]

I have fixed netlist view and default delay time for logic gates mentioned in #272. It remains to add a tutorial section on digital simulation.

[ra3xdh]

I have documented digital simulation in the Qucs-S tutorial. I will upload an updated tutorial to the Qucs-S website once the digital simulation feature will be released.

[ra3xdh]

Now all the feature of the Qucs-S-0.0.20-RC1 regarding digital simulation are backported to the Qucs-S. Closing this ticket as completed. This feature will be available since the next release.