Add support for 2712D0 variant #5847
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| #define BIT_TO_REG(b) (((b) >> 5) << 2) | ||
| #define BIT_TO_SHIFT(b) ((b) & 0x1f) | ||
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| #define MUX_BIT(mr,mb) (MUX_BIT_VALID + ((mr)*4)*8 + (mb)*4) |
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Can you add the missing space that checkpatch is complaining about?
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| // SPDX-License-Identifier: GPL-2.0 | |||
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This whole commit could be dropped now that we have the bcm2712d0 overlay, unless we're catering for upstream preferences.
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Yeah, I was thinking it will be wanted in future for upstream.
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| #define spi6 _spi6 | |||
| #define uart0 _uart0 | |||
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This commit could go before the addition of the bcm2712d0 variant, to avoid modifying it.
There is no point describing hardware blocks in C0/1 that aren't also in D0, so delete them. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
The bcm2712d0 overlay encapsulates the differences between BCM2712C0/1 and D0. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
BCM2712D0's sparse GPIO map revealed that it is not safe to treat group_selector as the GPIO number - it is an index into the array of pinctrl_pin_descs, and the "number" member says which GPIO it refers to. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
A non-zero mux bit number is used to detect a valid entry in the pin_regs tables, but GPIO 0 (GPIO 1 on D0) is a valid GPIO with a mux bit number of zero, so add a high-bit on all valid entries to distinguish this from an uninitialised row in the table. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
2712D0 has a simpler colourspace conversion matrix block so set that up. Signed-off-by: Dom Cobley <popcornmix@gmail.com>
2712D0 has increased the fifo sizes of MAI_THR blocks, resulting in adjusted bit offsets. Handle that. Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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Updated to address comments. |
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As it's only the HVS that differs with D0, the flag could be in vc4_hvs instead of vc4_dev. It would also then be the compatible for the HVS that gets updated instead of the overall driver. |
Get ready for forthcoming 2712D0 variant of processor, which purges some unused peripherals and has some register layout tweaks.