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ibex-dual-lockstep
ibex-dual-lockstep PublicForked from pulp-platform/ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
SystemVerilog
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pulp
pulp PublicForked from pulp-platform/pulp
This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.
SystemVerilog
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CHERI-Litmus
CHERI-Litmus PublicForked from pulp-platform/CHERI-Litmus
A tool to run litmus tests on bare-metal hardware
C
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culsans
culsans PublicForked from pulp-platform/culsans
Tightly-coupled cache coherence unit for CVA6 using the ACE protocol
C
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