Warm reset fix #84
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Warm reset fix #84
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This reverts commit 05602e2. Introducing a fence causes warm reset issue to reappear. Revert it for the time being.
alistair23
requested changes
Mar 6, 2019
| @@ -116,6 +116,9 @@ _fdt_reloc_done: | |||
| _wait_for_boot_hart: | |||
| la a4, _boot_hart_done | |||
| REG_L a5, (a4) | |||
| nop | |||
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Can you please add a comment inline to describe why this is required?
Also, why can't this be a fence? That seems like a bug somewhere else if a fence doesn't work
There was a problem hiding this comment.
Can you please add a comment inline to describe why this is required?
Done.
Also, why can't this be a fence? That seems like a bug somewhere else if a fence doesn't work
One possible explanation is non-boot cpu cache may have some stale corrupt DTB data which gets written. But this is a just theory and no way to prove it.
That's why commit text says that it's being reverted just for the time being until we figure out the actual reason.
All the non-boot harts run in a tight loop which may cause a heavy load on the memory bus. This may delay the boot hart to complete the cold boot process. Introduce few nop that will ease up the traffic. Signed-off-by: Atish Patra <atish.patra@wdc.com>
A warm reset using reset button may put icache and registers in non-coherent state. Flush the icache and reset all registers for every hart. Signed-off-by: Atish Patra <atish.patra@wdc.com>
avpatel
approved these changes
Mar 7, 2019
avpatel
approved these changes
Mar 7, 2019
avpatel
approved these changes
Mar 7, 2019
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This PR contains the 2nd part of warm reset fix. It also includes the changes in previous PR (#83 ).