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Clarify Zicsr dependence #909
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Signed-off-by: Nick Knight <nick.knight@sifive.com>
a4lg
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Further clarification is made so that 'Zve32x' implies 'Zicsr' (the same implication is already implemented in LLVM). See related issue (the author raised) on the vector specification: <riscvarchive/riscv-v-spec#908> and its resolution: <riscvarchive/riscv-v-spec#909> bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets): Add 'Zve32x' -> 'Zicsr'.
wangliu-iscas
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Aug 3, 2023
Further clarification is made so that 'Zve32x' implies 'Zicsr' (the same implication is already implemented in LLVM). See related issue (the author raised) on the vector specification: <riscvarchive/riscv-v-spec#908> and its resolution: <riscvarchive/riscv-v-spec#909> bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets): Add 'Zve32x' -> 'Zicsr'.
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Closes #908