feat(PTW,debug_cli), fix(TLB,difftest) #4
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Contributor
Guo-HY
commented
Jul 5, 2024
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Guo-HY
commented
- Align PTW with Centaur320
- Fix how G bit is used in tlb searchs
- Add TLB multi-hit check
- add 'info tlb' cmd to show valid tlb entries for debug cli
- improve difftest_csrcpy_idx
- fix CSR.TLBPS.PS width from 5 to 6(align with ISA)
- fix csrwr,csrrd,csrxchg：sign extension and write mask
- fix trans_div_wu
Fix how G bit is used in tlb searchs Add TLB multi-hit check
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CSR.TLBIDX,TLBEHI,PWCL,TID,TLBREHI:
The high bit of the old csr value read needs to be
the sign extension of the highest bit of the csr valid field.
CSR.CRMD,PRMD,EUEN,MISC,ECFG,ESTAT,EENTRY,
RVACFG,LLBCTL,TLBIDX,TLB(R)EHI,TLB(R)ELO0/1,
ASID,PGDL,PGDH,PWCL,PWCH,STLBPS,TLRENTRY,
TLBRERA,TLBRPRMD,DMW,TID:
Not all fields are writable.
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