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Add support for the riscv32i target #45

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merged 12 commits into from
Mar 10, 2020
Merged

Add support for the riscv32i target #45

merged 12 commits into from
Mar 10, 2020

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Disasm
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@Disasm Disasm commented Feb 26, 2020

Ported from fomu-rt

Closes: #34

@Disasm Disasm requested a review from a team as a code owner February 26, 2020 19:46
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Disasm commented Feb 26, 2020

There are no tests on CI for this target because they require an unreleased-yet version of the riscv crate with riscv32i support.

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xobs commented Mar 7, 2020

Would it be possible to take assemble.ps1 as well? It's kind of nice to work on both platforms.

Also, I've discovered that the CI tests don't seem to care which platform did the assembling.

Thanks for doing this, by the way!

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Disasm commented Mar 7, 2020

Added, thanks!

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Disasm commented Mar 7, 2020

Added CI rules and updated dependencies. I can't test this at the moment because I don't have any RISC-V hardware with me, but generated assembly for riscv-rust-quickstart looks sane. Seems like the latest r0 doesn't have any major changes.

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Disasm commented Mar 10, 2020

I checked this PR with icebreaker-litex-examples, works fine!

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Disasm commented Mar 10, 2020

Works for HiFive1 too.

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Disasm commented Mar 10, 2020

bors r=almindor

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bors bot commented Mar 10, 2020

Build succeeded

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3 participants