-
Notifications
You must be signed in to change notification settings - Fork 211
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
use AAPCS calling convention on all aeabi intrinsics #141
Conversation
also, on ARM, inline(always) the actual implementation of the intrinsics so we end with code like this: ``` 00000000 <__aeabi_dadd>: (implementation here) ``` instead of "trampolines" like this: ``` 00000000 <__aeabi_dadd>: (shuffle registers) (call __adddf3) 00000000 <__adddf3>: (implementation here) ``` closes #116
r=me, but looks like arm tests are failing? |
Yes, looking into it. Seems that there no aeabi intrinsics for i128 operations so LLVM is lowering those to the "x86 named" ones on ARM. |
- multi3: there's no aeabi equivalent - divmod{s,d}i4: these are directly called by __aeabi_{l,i}divmod - add{s,d}f3: required by the C sub{s,d}f3 implementation but make sure they also use the AAPCS calling convention
@bors r=alexcrichton |
📌 Commit 57085be has been approved by |
use AAPCS calling convention on all aeabi intrinsics also, on ARM, inline(always) the actual implementation of the intrinsics so we end with code like this: ``` 00000000 <__aeabi_dadd>: (implementation here) ``` instead of "trampolines" like this: ``` 00000000 <__aeabi_dadd>: (shuffle registers) (call __adddf3) 00000000 <__adddf3>: (implementation here) ``` closes #116 cc #66 r? @alexcrichton cc @mattico
👍 |
💔 Test failed - status-travis |
@bors r=alexcrichton |
📌 Commit 47b45d1 has been approved by |
use AAPCS calling convention on all aeabi intrinsics also, on ARM, inline(always) the actual implementation of the intrinsics so we end with code like this: ``` 00000000 <__aeabi_dadd>: (implementation here) ``` instead of "trampolines" like this: ``` 00000000 <__aeabi_dadd>: (shuffle registers) (call __adddf3) 00000000 <__adddf3>: (implementation here) ``` closes #116 cc #66 r? @alexcrichton cc @mattico
☀️ Test successful - status-appveyor, status-travis |
also, on ARM, inline(always) the actual implementation of the intrinsics so we
end with code like this:
instead of "trampolines" like this:
closes #116
cc #66
r? @alexcrichton
cc @mattico