[SPIR-V] Naive codegen for ByteAddressBuffer

[HansKristian-Work]

[vk::binding(2, 3)] RWByteAddressBuffer buffer0;

[shader("compute")]
[numthreads(1,1,1)]
void computeMain(uint3 threadId : SV_DispatchThreadID)
{
	buffer0.Store(64, buffer0.Load<uint4>(32));
}

#version 450
layout(row_major) uniform;
layout(row_major) buffer;
layout(std430, binding = 2, set = 3) buffer StructuredBuffer_uint_t_0 {
    uint _data[];
} buffer0_0;

#line 7 0
uvec4 RWByteAddressBuffer_Load_0(int _S1)
{

#line 2192 1
    return uvec4(buffer0_0._data[_S1 / 4], buffer0_0._data[(_S1 + 4) / 4], buffer0_0._data[(_S1 + 8) / 4], buffer0_0._data[(_S1 + 12) / 4]);
}


#line 2192
void RWByteAddressBuffer_Store_0(int _S2, uvec4 _S3)
{

#line 2192
    uint _S4 = buffer0_0._data[_S2 / 4] = _S3[0];

#line 2192
    uint _S5 = buffer0_0._data[(_S2 + 4) / 4] = _S3[1];

#line 2192
    uint _S6 = buffer0_0._data[(_S2 + 8) / 4] = _S3[2];

#line 2192
    uint _S7 = buffer0_0._data[(_S2 + 12) / 4] = _S3[3];

#line 2733
    return;
}


#line 5 0
layout(local_size_x = 1, local_size_y = 1, local_size_z = 1) in;
void main()
{

#line 5
    RWByteAddressBuffer_Store_0(64, RWByteAddressBuffer_Load_0(32));


    return;
}

Scalar unroll happens even when offsets are known to be aligned. Slang should support a version of Load/Store that takes explicit alignment, and vectorizes the access appropriately. dxil-spirv does heroics here for example.