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1. MNIST_Hardware_Accelerator_picoRV32 MNIST_Hardware_Accelerator_picoRV32 Public

   Forked from sgauthamr2001/MNIST_picoRV32

   Hardware Acceleration of a 2-layer integer quantised Neural Network trained on MNIST dataset.

   Verilog

2. sgauthamr2001/FPGA_Genome_Alignment sgauthamr2001/FPGA_Genome_Alignment Public

   Hardware Acceleration of Banded Smith-Waterman Algorithm on an FPGA using Systolic array based architecture.

   Verilog 9 3

3. Network-on-Chip Network-on-Chip Public

   Forked from V3D3/prashaant-netgen

   Generates a network with an outer and an inner network, with each network having a choice of topology. Not up to date

   Python

4. Computer-Architecture Computer-Architecture Public

   CS6600 Computer Architecture Course Project

   C++ 2

5. Computer-Organization Computer-Organization Public

   Verilog 1

6. Numerical-Methods Numerical-Methods Public

   Assignments for EE1103 Numerical Methods

   C