Fix FMA4 detection #262
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Fix FMA4 detection #262
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FMA4 support is in bit 16 of register ECX, not EDX of the "extended processor info" (0x80000001). The mapping of registers to reg is: reg[0] = eax reg[1] = ebx reg[2] = ecx <--- reg[3] = edx Bit 16 of EDX is PAT (Page Attribute Table) on AMD CPUs, which is widely supported. Intel CPUs do not set this bit. This causes "Illegal instruction" errors on AMD CPUs that do not support FMA4. See pytorch/pytorch#12112 See #261 http://developer.amd.com/wordpress/media/2012/10/254811.pdf (Page 20)
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FMA4 support is in bit 16 of register ECX, not EDX of the "extended
processor info" (0x80000001).
The mapping of registers to reg is:
reg[0] = eax
reg[1] = ebx
reg[2] = ecx <---
reg[3] = edx
Bit 16 of EDX is PAT (Page Attribute Table) on AMD CPUs, which is widely
supported. Intel CPUs do not set this bit. This causes "Illegal instruction"
errors on AMD CPUs that do not support FMA4.
See pytorch/pytorch#12112
See #261
http://developer.amd.com/wordpress/media/2012/10/254811.pdf (Page 20)
Fixes #261