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<!DOCTYPE HTML>
<!--
Miniport by HTML5 UP
html5up.net | @ajlkn
Free for personal and commercial use under the CCA 3.0 license (html5up.net/license)
-->
<html lang="en">
<head>
<title>Shivangi Gambhir</title>
<meta charset="utf-8" />
<meta name="viewport" content="width=device-width, initial-scale=1, user-scalable=no" />
<link rel="stylesheet" href="assets/css/main.css" />
<!-- Bootstrap CSS File -->
<link href="assets/css/bootstrap.min.css" rel="stylesheet">
<link href="assets/css/magnific-popup.css" rel="stylesheet">
<!-- Main Stylesheet File -->
<link href="assets/css/style.css" rel="stylesheet">
<!-- Responsive css -->
<link href="assets/css/responsive.css" rel="stylesheet">
</head>
<!--<body class="is-preload">-->
<body class contenteditable="false">
<!-- Nav -->
<nav id="nav">
<ul class="container">
<li><a href="#top">About</a></li>
<li><a href="#experience">Experience</a></li>
<li><a href="#work">Skills</a></li>
<li><a href="#portfolio">Projects</a></li>
<li><a href="#publications">Publications</a></li>
<li><a href="#extracurriculars">Achievements</a></li>
<li><a href="#interests">Personal Interests</a></li>
<li><a href="#contact">Contact</a></li>
</ul>
</nav>
<!-- Home -->
<article id="top" class="wrapper style1">
<div class="container">
<div class="row">
<div class="col-4 col-5-large col-12-medium">
<span class="image fit"><img src="images/my_photo_1.jpg" alt="" /></span>
</div>
<div class="col-8 col-7-large col-12-medium">
<header>
<h1>Hi. I'm <strong>Shivangi Gambhir</strong>.</h1>
</header>
<p>
I am currently residing in New Delhi.
I completed my high school from Kalpa Co-Educational School,Hyderabad and finished my secondary school from FIITJEE,Hyderabad.
I completed my undergraduate studies in the Electronics and Communication Engineering department from Manipal Institute of Technology,Manipal.
<br>
<br>
I am currently a <strong>Masters/Graduate</strong> student at <strong>Cornell University</strong> specializing in the <strong>Electrical and Computer Engineering</strong>
Discipline. My inquisitiveness and immense passion in <strong>Computer Architecture</strong> and <strong>Chip Designing</strong> has led me to
actively work and contribute on related projects. With two years work experience in <strong>Qualcomm</strong> and
the skills I'll be honing at Cornell, I look forward to explore/work in the world of chips & processors.</p>
</div>
</div>
</div>
</article>
<!-- Experience -->
<article id="experience" class="wrapper style2">
<div class="container">
<header>
<h2>Experience</h2>
<div class="row">
<div class="col-lg-5">
<a target ="_blank" href="https://www.qualcomm.com/">
<img src="images/qualcomm-logo.png" class="img-responsive company-logo" alt="">
</a>
</div>
<div class="col-lg-7">
<div class="company-txt">
<br>
<br>
Worked as an <strong>Associate Engineer</strong>,
in the <strong>Memory IP team</strong> in the
<strong>Front End Views division</strong> in <strong>Qualcomm India</strong> from <strong>July 2017 - July 2019 </strong>
<br>
<br>
My major work comprised of <strong>Behavioral Modelling</strong> of the Memories and <strong>Design Verification</strong>.
Modelling of the memory required hands on working with verilog and verification comprised of both <strong>functional verification</strong>
using the testbenches written by the team and <strong>formal verification</strong> using the ESPCV tool. <br> <br>
I actively contributed in projects dealing with lower technology nodes. I gained expertise in designing and developing failure analysis files that were
used to check the physical to logical address mapping of the memories.
<br><br>
Besides this, development of new quality checks using PERL scripting for the deliverables were an additional part of the work.I also
submitted a technical paper, along with other teammates, in <strong>“QBUZZ”</strong>.
The paper was titled <strong>“At-speed test coverage improvement using ram writethrough models”</strong>.
</div>
</div>
</div>
<br>
<br>
<div class="row">
<div class="col-lg-5">
<a target ="_blank" href="https://www.iisc.ac.in/">
<img src="images/iisc-logo.png" class="img-responsive company-logo-2" alt="">
</a>
</div>
<div class = "col-lg-7">
<div class="company-txt">
<br>
<br>
As a <strong>Project Intern</strong> in the <strong>Wireless Network Sensor Lab</strong> at
<strong>Indian Institute of Science,Bangalore,India</strong> from <strong>February 2017 to June 2017</strong>
<br>
<br>
Worked on a project "Intrusion detection using PIR sensors and Video Camera" at the Wireless Sensor Network Lab along
with other lab members <br>
Learned working of PIR sensors and Lucas Kanade Optical Flow Algorithm to detect moving objects.
</div>
</div>
</div>
<br>
<br>
<div class="row">
<div class="col-lg-5">
<a target ="_blank" href="https://www.drdo.gov.in/home">
<img src="images/drdo-logo.jpg" class="img-responsive company-logo-2" alt="">
</a>
</div>
<div class = "col-lg-7">
<div class="company-txt">
<br>
<br>
As an <strong>Industrial Trainee</strong> in the <strong>Defense Research and Development Laboratory </strong>
for two months
<br>
<br>
Implemented 1-D interpolation of data using VHDL Language for FPGA.<br>
The algorithm was simulated and produced satisfactory results when compared with the results on MATLAB.
</div>
</div>
</div>
<br>
<br>
</header>
</div>
</article>
<!-- Work -->
<article id="work" class="wrapper style2">
<div class="container">
<header>
<h2>Skill set</h2>
</header>
<div class="row aln-center">
<div class="col-4 col-6-medium col-12-small">
<section class="box style1">
<span class="fa fa-terminal fa-5x"></span>
<br>
<br>
<h3><strong>Technologies</strong></h3>
<p><center>System verilog, verilog, PERL, Python, VHDL , Basic Shell Scripting</center> </p>
</section>
</div>
<div class="col-4 col-6-medium col-12-small">
<section class="box style1">
<span class="fa fa-wrench fa-5x"></span>
<br>
<br>
<h3><strong>Tools</strong></h3>
<p><center>ESPCV, Virtuoso, Modelsim, VCS, MATLAB, GTKWave , NWave </center></p>
</section>
</div>
<div class="col-4 col-6-medium col-12-small">
<section class="box style1">
<span class="fa fa-server fa-5x"></span>
<br>
<br>
<h3><strong>Platforms and OS</strong></h3>
<p><center>Raspberry Pi, Arduino, 8051, ATMEGA16, Raspbian, Linux, Windows </center></p>
</section>
</div>
</div>
<footer>
<a href="#portfolio" class="button large scrolly">See some of my recent work</a>
</footer>
</div>
</article>
<!-- Portfolio -->
<article id="portfolio" class="wrapper style3">
<div class="container">
<header>
<h2>Projects</h2>
</header>
<div class="row">
<div class="col-4 col-6-medium col-12-small">
<article class="box style2" style="height: 915px;">
<a href="images/telepresence_robot.jpg" class="image featured"><img src="images/telepresence_robot.jpg " alt style="height: 300px;" /></a>
<h3><a><strong>Telepresence Robot</strong></a></h3>
<p>A Telepresence Robot is a videoconferencing bot that revolutionizes the way you feel.
It enables people to be at more than one place at a single time.
This robot which is placed in a remote location is capable to capture the environment in virtual form using Raspberry Pi.
The captured visuals are displayed on a webpage and virtual reality headset.
The robot present in the remote location can be maneuvered by the user using their smartphone.
It provides a real time repsonse to the users head movement using the android phone as an Inertial Measurement Unit(IMU) module.</p>
</article>
</div>
<div class="col-4 col-6-medium col-12-small">
<article class="box style2" style="height: 915px;">
<a href="images/imul.PNG" class="image featured"><img src="images/imul.PNG" alt style="height: 300px;" /></a>
<h3><a><strong>Iterative Integer Multiplier</strong></a></h3>
<p>An iterative multiplier is designed to carry out multiplication of two integers using repeated addition algorithm.
The first implementation is a fixed latency multiplier analogous to a single cycle CPU which always requires
the same number of cycles to complete one instruction. The second design is a variable-latency implementation that
helps to reduce the cycle time by increasing the cycles per instruction making use of the input operands. </p>
</article>
</div>
<div class="col-4 col-6-medium col-12-small">
<article class="box style2" style="height: 915px;">
<a href="images/processor.PNG" class="image featured"><img src="images/processor.PNG" alt style="height: 300px;" /></a>
<h3><a><strong>Pipelined Processor</strong></a></h3>
<p>In this project, we designed two implementations of 5 staged pipelined processors to execute register-register arithmetic and logical,
register-immediate arithmetic and logical,memory,jump and branch instructions through Fetch, Decode, Execute, Memory and Write-back stages.
The first design makes use of stalling, and an alternate design that uses bypassing in order to avoid various hazards raised by pipelining.</p>
</article>
</div>
<div class="col-4 col-6-medium col-12-small">
<article class="box style2" style="height: 850px;">
<a href="images/cache.PNG" class="image featured"><img src="images/cache.PNG" alt style="height: 220px;" /></a>
<h3><a><strong>Blocking Cache</strong></a></h3>
<p>The project is implemented to understand cache principles and to design and evaluate two cache systems. The cache is
designed for a total capacity of 256 bytes with 16 cache lines
Two cache systems were implemented namely direct-mapped cache and a two-way set-associative cache. In a direct mapped cache structure,
the cache is designed having multiple sets with a single cache line in every set. The Set associative cache can be imagined as a n by m matrix.
The cache is divided into ‘n’ sets and each set contains ‘m’ cache lines.A memory block is first mapped onto a set and then placed into any cache
line of the set.
</p>
</article>
</div>
<div class="col-4 col-6-medium col-12-small">
<article class="box style2" style="height: 850px;">
<a href="images/multicore.PNG" class="image featured"><img src="images/multicore.PNG" alt style="height: 220px;" /></a>
<h3><a><strong>Multicore system</strong></a></h3>
<p>The purpose of this project is to design a multicore system using four single core processors, private instruction and
shared data caches. The multicore system makes use of networks that have been provided beforehand. In this project, we integrate the already designed
pipelined processor and set associative caches. The processor was tested for corner cases and Cycles Per Instruction(CPI) was evaluated
in each case.
</p>
</article>
</div>
<div class="col-4 col-6-medium col-12-small">
<article class="box style2" style="height: 850px;">
<a href="images/neural.PNG" class="image featured"><img src="images/neural.PNG" alt style="height: 220px;" /></a>
<h3><a><strong>Neural Recording Front End Array</strong></a></h3>
<p>The goal of this project is to build the front-end of a neural recording system, which
would take the raw inputs from the brain, pass them through an amplifier to amplify the
signals, filter out the extraneous signals using a bandpass filter, and time multiplex the
signals sent through the 16 channels to output a desired signal. Meaningful data can be
extracted from this output that can contribute to current neuroscience research.</p>
</article>
</div>
</div>
<footer>
</footer>
</div>
</article>
<!-- Publications -->
<article id="publications" class="wrapper style3">
<div class="container">
<header>
<h2>Publications</h2>
<br>
<br>
<h3><a><strong>An Optical-Camera Complement to a PIR Sensor Array </strong></a></h3>
<br>
<br>
<p>"An Optical-Camera Complement to a PIR Sensor Array for Intrusion Detection and Classification in an Outdoor Environment,"
2017 IEEE 42nd Conference on Local Computer Networks Workshops (LCN Workshops), Singapore, 2017, pp. 44-52.
doi: 10.1109/LCN.Workshops.2017.63</p>
<a target="_blank" href="https://ieeexplore.ieee.org/document/8110203"> See Publication </a>
</header>
</div>
</article>
<!-- Extracurriculars -->
<article id="extracurriculars" class="wrapper style3">
<div class="container">
<header>
<h2>Achievements</h2>
<br>
<br>
<h3><a><strong>Manipal Entrepreneurship Summit</strong></a></h3>
<br>
<br>
<div class="row">
<div class="col-lg-5">
<img src="images/rentified.PNG" class="img-responsive company-logo" alt="">
</a>
</div>
<div class="col-lg-7">
<div class="company-txt">
<br>
<br>
<p>First Prize in a Business Competition at <strong>Manipal Entrepreneurship Summit</strong>,2016.
We pitched the idea for Rentified, a peer to peer platform for renting, and attained the first position.
</p>
<a target="_blank" href="https://www.youtube.com/watch?v=CVkyuIAsRbw"> Video </a>
<br>
</div>
</div>
</div>
<h3><a><strong>Love Bytes:20 tales of love</strong></a></h3>
<br>
<br>
<div class="row">
<div class="col-lg-5">
<img src="images/love_bytes.jpg" class="img-responsive company-logo-3" alt="">
</a>
</div>
<div class="col-lg-7">
<div class="company-txt">
<br>
<br>
<p>A published author along with 19 other co-authors in Love Bytes. Love Bytes is a tale of 20 different love stories published on October
17th, 2014 (ISBN: 9789384180799)
</p>
<a target="_blank" href="http://booklikes.com/love-bytes-20-tales-of-love-shivam-mishra-shraddha-nanchahil-priyank-mayank/book,13481868"> Know More </a>
</div>
</div>
</div>
<h3><a><strong>The Campus Connect</strong></a></h3>
<br>
<br>
<div class="row">
<div class="col-lg-5">
<img src="images/tcc.png" class="img-responsive company-logo-3" alt="">
</a>
</div>
<div class="col-lg-7">
<div class="company-txt">
<br>
<br>
<p>Was <strong>Chief Editor</strong> at The Campus Connect. <br>
The Campus Connect is an online nationwide network of students from all backgrounds coming under one umbrella.
We write and publish blogs and encourage people to come forth with their experiences.
</p>
<a target="_blank" href="https://thecampusconnect.com/"> Know More </a>
</div>
</div>
</div>
<h3><a><strong>Head Girl</strong></a></h3>
<br>
<br>
<div class="row">
<div class="col-lg-5">
<img src="images/head_girl.jpg" class="img-responsive company-logo-4" alt="">
</a>
</div>
<div class="col-lg-7">
<div class="company-txt">
<br>
<br>
<p>Invested as the <strong>Head Girl</strong> of Kalpa Co-Eduactional at High Scool Level(2010-2011)<br>
As the Head Girl of the School, I had been invested with the responsibilities to manage all the houses of the school and
co-ordinate the activities & events in the school.
</p>
</div>
</div>
</div>
</header>
</div>
</article>
<!-- Interests -->
<article id="interests" class="wrapper style3">
<div class="container">
<header>
<h2>Personal Interests</h2>
<br>
<div class="row">
<div class="column">
<div class="card">
<img src="images/adventure.jpg" alt="adventure" style="width:100%" height="100%">
<div class="container">
<br>
<h2>Adventure Sports</h2>
<p></p>
</div>
</div>
</div>
</div>
<div class="row">
<div class="column">
<div class="card">
<img src="images/baking.jpg" alt="baking" style="width:100%" height="100%">
<div class="container">
<br>
<h2>Baking</h2>
<p></p>
</div>
</div>
</div>
</div>
</header>
</div>
</article>
<!-- Contact -->
<article id="contact" class="wrapper style4">
<div class="col-12">
<hr />
<h3>Find me on ...</h3>
<ul class="social">
<li><a href="https://www.facebook.com/shivangi.gambhir" class="icon brands fa-facebook-f"><span class="label">Facebook</span></a></li>
<li><a href="https://www.linkedin.com/in/shivangi-gambhir/" class="icon brands fa-linkedin-in"><span class="label">LinkedIn</span></a></li>
<li><a href="https://join.skype.com/invite/vZV65hXuuhNL" class="icon brands fa-skype"></a></li>
</ul>
<hr />
</div>
</div>
<footer>
<ul id="copyright">
<li>© Untitled. All rights reserved.</li><li>Design: <a href="http://html5up.net">HTML5 UP</a></li>
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