microcircuit SLG46620 CNT/DLY2/FSM0 (from dialog semiconductor company) SystemVerilog interpretation. Dataseet is: https://www.dialog-semiconductor.com/sites/default/files/slg46620r115_10282019.pdf Simulation: QuestaSim x64 ver2020.1 Needed simulation libraries: altera_primitives (build: $projectSource/verification/altera_primitives)
-
Notifications
You must be signed in to change notification settings - Fork 0
microcircuit SLG46620 CNT/DLY2/FSM0 (from dialog semiconductor company) SystemVerilog interpretation. Dataseet is: https://www.dialog-semiconductor.com/sites/default/files/slg46620r115_10282019.pdf Simulation: QuestaSim x64 ver2020.1 Needed simulation libraries: altera_primitives (build: $projectSource/verification/altera_primitives)
License
shpegun60/cnt_dly_SLG46620
Folders and files
Name | Name | Last commit message | Last commit date | |
---|---|---|---|---|
Repository files navigation
About
microcircuit SLG46620 CNT/DLY2/FSM0 (from dialog semiconductor company) SystemVerilog interpretation. Dataseet is: https://www.dialog-semiconductor.com/sites/default/files/slg46620r115_10282019.pdf Simulation: QuestaSim x64 ver2020.1 Needed simulation libraries: altera_primitives (build: $projectSource/verification/altera_primitives)
Topics
Resources
License
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published