RVV 1.0 integration testing on real hardware #1184

alitariq4589 · 2024-05-22T10:50:00Z

This PR contains a riscv64-cross.txt file for cross compiling for riscv64 architecture on meson, a cloud-v-pipeline file for CI flow and a Makefile for running tests on RISC-V architecture (since meson fails when binaries are transferred from one platform to the other).

The Makefile contains a very simple bash script in it which executes are the executables in the build/test directory recursively and prints out the passed and failed tests' count along with the total number of counts.

Currently the passing criteria is that all the binaries should be executed with a return code of zero. Else the test will fail.

A complete CI build of this is present at: https://dash.cloud-v.co/blue/organizations/jenkins/simde-fork/detail/simde-fork/48/pipeline/51/

mr-c

Thank you @alitariq4589 , I left you some comments

riscv64-cross.txt

cloud-v-pipeline

Makefile

alitariq4589 · 2024-05-23T06:35:00Z

@mr-c I made all the changes you requested. Also, previously, the compile was for riscv64 default target (which was rv64gc). Now I have added -march=rv64gcv to compile for vector extension. For rv64gc, all 2002 tests pass but for rv64gcv, tests are failing. I think it is because of some porting issue in the source code macros.

mr-c · 2024-05-27T07:02:19Z

Thank you @alitariq4589 ; this is exactly the sort of issue we want to catch using CI!

@zengdage @howjmay @eric900115 Can you look into this compile errors when using -march=rv64gcv and also why they weren't caught with our existing testing?

Details

../test/arm/neon/../../../simde/arm/neon/types.h:54:5: error: unknown type name 'fixed_vint8m1_t'
   54 |     fixed_vint8m1_t sv64;
      |     ^~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:67:5: error: unknown type name 'fixed_vint16m1_t'
   67 |     fixed_vint16m1_t sv64;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:80:5: error: unknown type name 'fixed_vint32m1_t'
   80 |     fixed_vint32m1_t sv64;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:93:5: error: unknown type name 'fixed_vint64m1_t'
   93 |     fixed_vint64m1_t sv64;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:106:5: error: unknown type name 'fixed_vuint8m1_t'
  106 |     fixed_vuint8m1_t sv64;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:119:5: error: unknown type name 'fixed_vuint16m1_t'
  119 |     fixed_vuint16m1_t sv64;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:132:5: error: unknown type name 'fixed_vuint32m1_t'
  132 |     fixed_vuint32m1_t sv64;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:145:5: error: unknown type name 'fixed_vuint64m1_t'
  145 |     fixed_vuint64m1_t sv64;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:175:5: error: unknown type name 'fixed_vfloat32m1_t'
  175 |     fixed_vfloat32m1_t sv64;
      |     ^~~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:188:5: error: unknown type name 'fixed_vfloat64m1_t'
  188 |     fixed_vfloat64m1_t sv64;
      |     ^~~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:196:5: error: unknown type name 'fixed_vuint8m1_t'
  196 |     fixed_vuint8m1_t sv64;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:203:5: error: unknown type name 'fixed_vuint16m1_t'
  203 |     fixed_vuint16m1_t sv64;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:210:5: error: unknown type name 'fixed_vuint64m1_t'
  210 |     fixed_vuint64m1_t sv64;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:230:5: error: unknown type name 'fixed_vint8m1_t'
  230 |     fixed_vint8m1_t sv128;
      |     ^~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:251:5: error: unknown type name 'fixed_vint16m1_t'
  251 |     fixed_vint16m1_t sv128;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:276:5: error: unknown type name 'fixed_vint32m1_t'
  276 |     fixed_vint32m1_t sv128;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:297:5: error: unknown type name 'fixed_vint64m1_t'
  297 |     fixed_vint64m1_t sv128;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:318:5: error: unknown type name 'fixed_vuint8m1_t'
  318 |     fixed_vuint8m1_t sv128;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:339:5: error: unknown type name 'fixed_vuint16m1_t'
  339 |     fixed_vuint16m1_t sv128;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:360:5: error: unknown type name 'fixed_vuint32m1_t'
  360 |     fixed_vuint32m1_t sv128;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:381:5: error: unknown type name 'fixed_vuint64m1_t'
  381 |     fixed_vuint64m1_t sv128;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:427:5: error: unknown type name 'fixed_vfloat32m1_t'
  427 |     fixed_vfloat32m1_t sv128;
      |     ^~~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:448:5: error: unknown type name 'fixed_vfloat64m1_t'
  448 |     fixed_vfloat64m1_t sv128;
      |     ^~~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:456:5: error: unknown type name 'fixed_vuint8m1_t'
  456 |     fixed_vuint8m1_t sv128;
      |     ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:463:5: error: unknown type name 'fixed_vuint16m1_t'
  463 |     fixed_vuint16m1_t sv128;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:470:5: error: unknown type name 'fixed_vuint64m1_t'
  470 |     fixed_vuint64m1_t sv128;
      |     ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:781:11: error: unknown type name 'fixed_vint8m1_t'
  781 |   typedef fixed_vint8m1_t    simde_int8x8_t;
      |           ^~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:782:11: error: unknown type name 'fixed_vint16m1_t'
  782 |   typedef fixed_vint16m1_t   simde_int16x4_t;
      |           ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:783:11: error: unknown type name 'fixed_vint32m1_t'
  783 |   typedef fixed_vint32m1_t   simde_int32x2_t;
      |           ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:784:11: error: unknown type name 'fixed_vint64m1_t'
  784 |   typedef fixed_vint64m1_t   simde_int64x1_t;
      |           ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:785:11: error: unknown type name 'fixed_vuint8m1_t'
  785 |   typedef fixed_vuint8m1_t   simde_uint8x8_t;
      |           ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:786:11: error: unknown type name 'fixed_vuint16m1_t'
  786 |   typedef fixed_vuint16m1_t  simde_uint16x4_t;
      |           ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:787:11: error: unknown type name 'fixed_vuint32m1_t'
  787 |   typedef fixed_vuint32m1_t  simde_uint32x2_t;
      |           ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:788:11: error: unknown type name 'fixed_vuint64m1_t'
  788 |   typedef fixed_vuint64m1_t  simde_uint64x1_t;
      |           ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:789:11: error: unknown type name 'fixed_vfloat32m1_t'
  789 |   typedef fixed_vfloat32m1_t simde_float32x2_t;
      |           ^~~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:790:11: error: unknown type name 'fixed_vfloat64m1_t'
  790 |   typedef fixed_vfloat64m1_t simde_float64x1_t;
      |           ^~~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:792:11: error: unknown type name 'fixed_vint8m1_t'
  792 |   typedef fixed_vint8m1_t    simde_int8x16_t;
      |           ^~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:793:11: error: unknown type name 'fixed_vint16m1_t'
  793 |   typedef fixed_vint16m1_t   simde_int16x8_t;
      |           ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:794:11: error: unknown type name 'fixed_vint32m1_t'
  794 |   typedef fixed_vint32m1_t   simde_int32x4_t;
      |           ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:795:11: error: unknown type name 'fixed_vint64m1_t'
  795 |   typedef fixed_vint64m1_t   simde_int64x2_t;
      |           ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:796:11: error: unknown type name 'fixed_vuint8m1_t'
  796 |   typedef fixed_vuint8m1_t   simde_uint8x16_t;
      |           ^~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:797:11: error: unknown type name 'fixed_vuint16m1_t'
  797 |   typedef fixed_vuint16m1_t  simde_uint16x8_t;
      |           ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:798:11: error: unknown type name 'fixed_vuint32m1_t'
  798 |   typedef fixed_vuint32m1_t  simde_uint32x4_t;
      |           ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:799:11: error: unknown type name 'fixed_vuint64m1_t'
  799 |   typedef fixed_vuint64m1_t  simde_uint64x2_t;
      |           ^~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:800:11: error: unknown type name 'fixed_vfloat32m1_t'
  800 |   typedef fixed_vfloat32m1_t simde_float32x4_t;
      |           ^~~~~~~~~~~~~~~~~~
../test/arm/neon/../../../simde/arm/neon/types.h:801:11: error: unknown type name 'fixed_vfloat64m1_t'
  801 |   typedef fixed_vfloat64m1_t simde_float64x2_t;
      |           ^~~~~~~~~~~~~~~~~~

Full log: https://dash.cloud-v.co/job/simde/15/consoleFull

zengdage · 2024-05-27T07:26:16Z

@alitariq4589 @mr-c Hi, I think the compiler errors are caused by fixed_vint8m1_t and it's variants. In gcc/clang, it has be supported by the following patches. Maybe you need to add some flags like-mrvv-vector-bits=128 to build it.

https://gcc.gnu.org/pipermail/gcc-patches/2024-March/648204.html
https://reviews.llvm.org/D142144

alitariq4589 · 2024-05-28T09:50:09Z

@zengdage Thanks for providing me the link to the patch changelog. I added the compilation flag which you requested. However, it is unrecognized in the RISC-V 64 GNU GCC cross-compiler. Also, I am using RISC-V 64-bit GNU cross compiler (nightly build pre-release version April 12, 2024 which is the latest version in pre-release list) on x86 because compiling the source code on K230 kendryte is very time-consuming because of the lack of compute resources on it.

Also, I have tried searching for fixed_vint8m1_t string but could not find it in the https://gcc.gnu.org/pipermail/gcc-patches/2024-March/648204.html link. Maybe they did not add it yet?

zengdage · 2024-05-28T10:48:44Z

@alitariq4589 please look at that, https://godbolt.org/z/r7Ksbo1oP , I think it's the usage of fixed_vint8m1_t in the latest gcc.

alitariq4589 · 2024-05-28T12:34:16Z

@zengdage Thanks for referring me to the link. The compiler version in the environment is 13.2.0. I will update the compiler to 14.1.0 and will try to compile again.

alitariq4589 · 2024-05-28T14:57:46Z

I have compiled the master branch from source and the compiled binary includes gcc version 13.2.0. I think latest version 14.1.0 is not yet upstreamed in the RISC-V GNU Toolchain cross compilers which will cause us to wait till they do so.

alitariq4589 · 2024-06-05T07:47:55Z

I have updated the riscv gnu toolchain version to 14.1.1 and also updated the CI files. Previous errors are resolved but there are some new errors in the log (full log available at: https://dash.cloud-v.co/view/SIMDe/job/simde/25/console).

alitariq4589 · 2024-06-11T10:38:21Z

@mr-c @zengdage bumping this PR.

mr-c · 2024-06-11T12:03:22Z

@zengdage Any thoughts? See https://dash.cloud-v.co/view/SIMDe/job/simde/25/console

riscv64-unknown-linux-gnu-gcc -march=rv64gcv_zvl256b -mrvv-vector-bits=zvl -mabi=lp64d -Ofast -Itest/arm/neon/addv-emul-c.p -Itest/arm/neon -I../test/arm/neon -I. -I.. -fdiagnostics-color=always -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -std=c99 -g -fopenmp-simd -DSIMDE_CONSTRAINED_COMPILATION -DSIMDE_ENABLE_OPENMP -Wno-psabi -DSIMDE_TEST_BARE -DSIMDE_NO_NATIVE -MD -MQ test/arm/neon/addv-emul-c.p/addv.c.o -MF test/arm/neon/addv-emul-c.p/addv.c.o.d -o test/arm/neon/addv-emul-c.p/addv.c.o -c ../test/arm/neon/addv.c
/tmp/ccPu0NMf.s: Assembler messages:
/tmp/ccPu0NMf.s:1253: Error: instruction vsetvli requires absolute expression
/tmp/ccPu0NMf.s:1253: Error: illegal operands `vsetvli t6,t6,e0,m1,ta,ma'
/tmp/ccPu0NMf.s:1535: Error: instruction vsetvli requires absolute expression
/tmp/ccPu0NMf.s:1535: Error: illegal operands `vsetvli a2,a2,e0,m1,ta,ma'
/tmp/ccPu0NMf.s:2863: Error: instruction vsetvli requires absolute expression
/tmp/ccPu0NMf.s:2863: Error: illegal operands `vsetvli t6,t6,e0,m1,ta,ma'
/tmp/ccPu0NMf.s:3146: Error: instruction vsetvli requires absolute expression
/tmp/ccPu0NMf.s:3146: Error: illegal operands `vsetvli a2,a2,e0,m1,ta,ma'

zengdage · 2024-06-12T01:32:26Z

instruction vsetvli requires absolute expression

@alitariq4589 Sorry for the late reply, and I don't know why it get these errors. I try to use the gcc 14.1 in Compiler Explorer, https://godbolt.org/z/4qzrdPs7v , and it can compile addv.c successfully.

According to the google result,
https://inbox.sourceware.org/binutils/2022121416064372037428@eswincomputing.com/T/
riscv-software-src/riscv-tests#9

I think the issue have been fixed in gcc 14.1, so may you check that is something mismatched in your configurations.

zengdage · 2024-06-12T01:33:20Z

.cloud-v/cloud-v-pipeline

+            module load riscv64-gnu-glibc/14.1.1
+            riscv64-unknown-linux-gnu-gcc --version
+            meson setup build --cross-file=./docker/cross-files/riscv64-gcc-13-unknown.cross -Db_lundef=false
+        '''


Does it need to be modified here? 13->14 ?

The file could be renamed, but its contents don't mention the GCC version

https://github.com/simd-everywhere/simde/pull/1184/files#diff-8e5bdcf98aed37c1bff927573747ea9badeb2ae4ae8f5158aeae9abffd5baff6

mr-c · 2024-06-21T13:47:40Z

docker/cross-files/riscv64-gcc-13-unknown.cross

+c = ['riscv64-unknown-linux-gnu-gcc', '-march=rv64gcv_zvl256b', '-mrvv-vector-bits=zvl', '-mabi=lp64d', '-Ofast']
+cpp = ['riscv64-unknown-linux-gnu-g++', '-march=rv64gcv_zvl256b', '-mrvv-vector-bits=zvl', '-mabi=lp64d', '-Ofast']


Normally we don't build with -Ofast, maybe that matters for your cross compiler?

Suggested change

c = ['riscv64-unknown-linux-gnu-gcc', '-march=rv64gcv_zvl256b', '-mrvv-vector-bits=zvl', '-mabi=lp64d', '-Ofast']

cpp = ['riscv64-unknown-linux-gnu-g++', '-march=rv64gcv_zvl256b', '-mrvv-vector-bits=zvl', '-mabi=lp64d', '-Ofast']

c = ['riscv64-unknown-linux-gnu-gcc', '-march=rv64gcv_zvl256b', '-mrvv-vector-bits=zvl', '-mabi=lp64d', '-O3']

cpp = ['riscv64-unknown-linux-gnu-g++', '-march=rv64gcv_zvl256b', '-mrvv-vector-bits=zvl', '-mabi=lp64d', '-O3']

Thanks for the suggestion. I will try rebuilding it without -Ofast flag

alitariq4589 · 2024-06-25T15:11:10Z

@mr-c @zengdage I have run the build with -O3 and without any optimization at all.

The build with -O3 failed during compile stage. The complete log is available at this link
The build without any optimization flags passed at the compile stage but the tests failed during execution in the kendryte k230 RISC-V compute instance. The complete list of failed tests are available in test.mak.log. The complete log is available at this link

I have not yet configured the pipeline to publish the test.mak.log file so following is the test.mak.log file.
test.mak.log

alitariq4589 · 2024-06-27T12:55:40Z

Update: I have updated the pipeline file to archive artifacts of builds.

The latest build is #39 where you can check the test.mak.log file in the Build Artifacts section.

mr-c · 2024-07-01T12:52:47Z

Update: I have updated the pipeline file to archive artifacts of builds.

The latest build is #39 where you can check the test.mak.log file in the Build Artifacts section.

Huh, that is a lot of errors. I guess they need reporting upstream. Do you get the same errors without -march=rv64gcv_zvl256b -mrvv-vector-bits=zvl -mabi=lp64d ?

alitariq4589 · 2024-07-02T09:53:10Z

Update: I have updated the pipeline file to archive artifacts of builds.
The latest build is #39 where you can check the test.mak.log file in the Build Artifacts section.

Huh, that is a lot of errors. I guess they need reporting upstream. Do you get the same errors without -march=rv64gcv_zvl256b -mrvv-vector-bits=zvl -mabi=lp64d ?

@mr-c I tried building and running this just for RV64GC in the past (i.e. without vector extension flags) and it ran successfully. The build log is available at private CI pipeline here

alitariq4589 added 17 commits May 19, 2024 18:54

Added Makefile and cross file for build

7ad946b

Modified Makefile

486353c

Added cloud-v-pipeline file

e46ed6a

Changed the cloning process

26177ae

Changed cloning command

d8e7efe

Changed cloning command

330d9d4

Added cleanup stage

729f211

Removed clean stage

d6c3781

modified clone stage

870f91c

Corrected pipeline file

a21ffaa

Added clean up step on k230

24c7d77

changed compress command

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Added source file

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Changed the stashed file content

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Changed the command for source

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Changed the clone branch to master

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mr-c requested changes May 22, 2024

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alitariq4589 added 4 commits May 22, 2024 16:19

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alitariq4589 added 3 commits May 28, 2024 14:34

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mr-c mentioned this pull request May 28, 2024

Add explanation on how to use the RISCV vector implementations to the README #1145

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alitariq4589 added 4 commits June 5, 2024 12:04

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mr-c changed the title ~~RVV 1.0 integration~~ RVV 1.0 integration testing on real hardware Jun 21, 2024

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alitariq4589 added 3 commits June 24, 2024 12:25

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RVV 1.0 integration testing on real hardware #1184

RVV 1.0 integration testing on real hardware #1184

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		c = ['riscv64-unknown-linux-gnu-gcc', '-march=rv64gcv_zvl256b', '-mrvv-vector-bits=zvl', '-mabi=lp64d', '-Ofast']
		cpp = ['riscv64-unknown-linux-gnu-g++', '-march=rv64gcv_zvl256b', '-mrvv-vector-bits=zvl', '-mabi=lp64d', '-Ofast']

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