Update embedded-time to 0.11.0

Cargo.toml

@@ -37,7 +37,7 @@ cortex-m = "0.7"
 cortex-m-rt = "0.6"
 embedded-dma = "0.1"
 embedded-hal = "0.2"
-embedded-time = "0.10"
+embedded-time = "0.11"
 nb = "1"
 paste = "1"
 rtcc = "0.2"

src/i2c.rs

@@ -116,7 +116,7 @@ impl<I2C, SCL, SDA> I2c<I2C, (SCL, SDA)> {
         SCL: SclPin<I2C>,
         SDA: SdaPin<I2C>,
     {
-        crate::assert!(*freq.integer() <= 1_000_000);
+        crate::assert!(freq.integer() <= 1_000_000);
 
         I2C::enable_clock(apb1);
 
@@ -129,16 +129,16 @@ impl<I2C, SCL, SDA> I2c<I2C, (SCL, SDA)> {
         // t_SYNC1 + t_SYNC2 > 4 * t_I2CCLK
         // t_SCL ~= t_SYNC1 + t_SYNC2 + t_SCLL + t_SCLH
         let i2cclk = I2C::clock(&clocks).0;
-        let ratio = i2cclk / *freq.integer() - 4;
-        let (presc, scll, sclh, sdadel, scldel) = if *freq.integer() >= 100_000 {
+        let ratio = i2cclk / freq.integer() - 4;
+        let (presc, scll, sclh, sdadel, scldel) = if freq.integer() >= 100_000 {
             // fast-mode or fast-mode plus
             // here we pick SCLL + 1 = 2 * (SCLH + 1)
             let presc = ratio / 387;
 
             let sclh = ((ratio / (presc + 1)) - 3) / 3;
             let scll = 2 * (sclh + 1) - 1;
 
-            let (sdadel, scldel) = if *freq.integer() > 400_000 {
+            let (sdadel, scldel) = if freq.integer() > 400_000 {
                 // fast-mode plus
                 let sdadel = 0;
                 let scldel = i2cclk / 4_000_000 / (presc + 1) - 1;

src/pwm.rs

@@ -285,7 +285,7 @@ macro_rules! pwm_timer_private {
             // It might make sense to move into the clocks as a crate-only property.
             // TODO: ppre1 is used in timer.rs (never ppre2), should this be dynamic?
             let clock_freq = clocks.$pclkz().0 * if clocks.ppre1() == 1 { 1 } else { 2 };
-            let prescale_factor = clock_freq / res as u32 / *freq.integer();
+            let prescale_factor = clock_freq / res as u32 / freq.integer();
             // NOTE(write): uses all bits of this register.
             tim.psc.write(|w| w.psc().bits(prescale_factor as u16 - 1));
 

src/rcc.rs

@@ -343,7 +343,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn use_hse(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.hse = Some(*freq.integer());
+        self.hse = Some(freq.integer());
         self
     }
 
@@ -376,7 +376,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn hclk(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.hclk = Some(*freq.integer());
+        self.hclk = Some(freq.integer());
         self
     }
 
@@ -392,7 +392,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn pclk1(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.pclk1 = Some(*freq.integer());
+        self.pclk1 = Some(freq.integer());
         self
     }
 
@@ -414,7 +414,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn pclk2(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.pclk2 = Some(*freq.integer());
+        self.pclk2 = Some(freq.integer());
         self
     }
 
@@ -439,7 +439,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn sysclk(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.sysclk = Some(*freq.integer());
+        self.sysclk = Some(freq.integer());
         self
     }
 

src/serial.rs

@@ -142,7 +142,7 @@ macro_rules! hal {
                     apb.rstr().modify(|_, w| w.$usartXrst().set_bit());
                     apb.rstr().modify(|_, w| w.$usartXrst().clear_bit());
 
-                    let brr = clocks.$pclkX().0 / *baud_rate.integer();
+                    let brr = clocks.$pclkX().0 / baud_rate.integer();
                     crate::assert!(brr >= 16, "impossible baud rate");
                     // NOTE(write): uses all bits of this register.
                     usart.brr.write(|w| unsafe { w.bits(brr) });

src/spi.rs

@@ -503,7 +503,7 @@ macro_rules! hal {
 
                 fn compute_baud_rate(clocks: Hertz, freq: Hertz) -> spi1::cr1::BR_A {
                     use spi1::cr1::BR_A;
-                    match clocks.0 / *freq.integer() {
+                    match clocks.0 / freq.integer() {
                         0 => crate::unreachable!(),
                         1..=2 => BR_A::DIV2,
                         3..=5 => BR_A::DIV4,

src/timer.rs

@@ -95,7 +95,7 @@ macro_rules! hal {
                 {
                     self.stop();
 
-                    let frequency = *timeout.into().integer();
+                    let frequency = timeout.into().integer();
                     let timer_clock = $TIMX::get_clk(&self.clocks);
                     let ticks = timer_clock.0 * if self.clocks.ppre1() == 1 { 1 } else { 2 }
                         / frequency;

src/watchdog.rs

@@ -96,7 +96,7 @@ impl WatchdogEnable for IndependentWatchDog {
     type Time = Milliseconds;
 
     fn start<T: Into<Self::Time>>(&mut self, period: T) {
-        self.setup(*period.into().integer());
+        self.setup(period.into().integer());
 
         self.iwdg.kr.write(|w| w.key().start());
     }