v1.9.9

What's Changed

• minor rtl clean-ups and optimization by @stnolting in #872
• use simplified VHDL file headers by @stnolting in #873
• ⚠️ rename SLINK data interface registers by @stnolting in #874
• ⚠️ simplify XBUS gateway by @stnolting in #876
• [DMA] use FIRQ select instead of FIRQ mask by @stnolting in #877
• rtl logic optimization and cleanups by @stnolting in #880
• fix external debug-halt vs. exception concurrency by @stnolting in #882
• minor rtl fixes by @stnolting in #883
• [rtl] fix single-step halting by @stnolting in #887
• minor rtl cleanups by @stnolting in #889
• Fix UART receiver by @Unike267 in #891

Full Changelog: v1.9.8...v1.9.9