Integrate rv32i conformance tests #6

eriktai · 2020-01-22T14:44:49Z

I have modified the simulator which is compatible with the riscv-compliance tests procedure.

Add the method of how to test file

jserv · 2020-01-22T15:00:58Z

Again, use git rebase -i to rework the commits. Minimize the changes and ensure fully corresponding to conformance tests as the subject claimed.

jserv · 2020-01-23T18:45:18Z

Remove compressed instruction related commits in this pull request.

.gitignore

README.md

emu-rv32i.c

test1.c

I have modified the emu-rv32i for supporting riscv-compliance test-suite. However, it is needed to copy the makefile.include to the specified directory which is explained in README.md.

jserv · 2020-02-06T07:46:00Z

Can you rebase upstream/master again?

jserv · 2020-02-06T07:46:53Z

CSRs.h

@@ -0,0 +1,93 @@
+/* Modified by Nober <s0913768710@gmail.com>


Don't leave such modification message. Instead, your name will be mentioned as a contributor once this pull request is merged.

jserv · 2020-02-06T07:48:38Z

emu-rv32i.c

 /* uncomment this for an instruction trace and other debug outputs */
-// #define DEBUG_OUTPUT
-// #define DEBUG_EXTRA
+#define DEBUG_OUTPUT


Don't change DEBUG_OUTPUT or DEBUG_EXTRA.

jserv · 2020-02-06T07:49:29Z

emu-rv32i.c

+#ifdef DEBUG_OUTPUT
+    printf("address %08x\n", p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24));
+#endif
+#ifdef RV32C


Don't put RV32C specific code here.

Does this mean my completing of the conformance test of rv32i first in this branch by restoring the emu_rv32i back to the original vision without the support for rv32c? After finishing this PR, do I need to open another new PR for rv32c or just update in here?

jserv · 2020-02-06T07:49:58Z

emu-rv32i.c

@@ -703,7 +709,7 @@ int raise_interrupt()

 /* read 32-bit instruction from memory by PC */

-uint32_t get_insn32(uint32_t pc)
+unsigned char get_insn32(uint32_t pc, uint32_t *insn)


I am not sure why you would change the type of return values.

In order to support the rv32c, I change the mechanism of this function to get instructions by the pointer and return the type of instruction through number, 1 or 0, which is why I change the type of return values. I have set the macro for this, which is CINSN and INSN.

In this branch, I will restore the function to the original one.

This pull request should minimize the changes and ensure everything is dedicated to compliance tests.

jserv · 2020-02-06T07:50:26Z

emu-rv32i.c

+        rs2 = (insn >> 20) & 0x1f;
+    }
+
+#ifdef RV32C


Ditto. No RV32C related code in this pull request.

jserv · 2020-02-15T13:58:35Z

Any progress?

eriktai · 2020-02-16T07:41:09Z

Sorry, I finished it but didn't push up. I changed the flow of the conformance test, which was better.
No need for the operation of copying any more.

eriktai · 2020-02-16T07:44:32Z

$ make RISCV_PREFIX=riscv-none-embed- RISCV_DEVICE=rv32i TARGET_SIM=/abs/to/emu-rv32i RISCV_TARGET=rv32emu TARGETDIR=/abs/to/riscv-target variant

...
make[1]: Leaving directory '/path/to/riscv-compliance/riscv-test-suite/rv32i'
riscv-test-env/verify.sh


Compare to reference files ... 

Check             comb ... OK
Check         I-ADD-01 ... OK
Check        I-ADDI-01 ... OK
Check         I-AND-01 ... OK
Check        I-ANDI-01 ... OK
Check       I-AUIPC-01 ... OK
Check         I-BEQ-01 ... OK
Check         I-BGE-01 ... OK
Check        I-BGEU-01 ... OK
Check         I-BLT-01 ... OK
Check        I-BLTU-01 ... OK
Check         I-BNE-01 ... OK
Check I-DELAY_SLOTS-01 ... OK
Check      I-EBREAK-01 ... OK
Check       I-ECALL-01 ... OK
Check   I-ENDIANESS-01 ... OK
Check             I-IO ... OK
Check         I-JAL-01 ... OK
Check        I-JALR-01 ... OK
Check          I-LB-01 ... OK
Check         I-LBU-01 ... OK
Check          I-LH-01 ... OK
Check         I-LHU-01 ... OK
Check         I-LUI-01 ... OK
Check          I-LW-01 ... OK
Check I-MISALIGN_JMP-01 ... OK
Check I-MISALIGN_LDST-01 ... OK
Check         I-NOP-01 ... OK
Check          I-OR-01 ... OK
Check         I-ORI-01 ... OK
Check     I-RF_size-01 ... OK
Check    I-RF_width-01 ... OK
Check       I-RF_x0-01 ... OK
Check          I-SB-01 ... OK
Check          I-SH-01 ... OK
Check         I-SLL-01 ... OK
Check        I-SLLI-01 ... OK
Check         I-SLT-01 ... OK
Check        I-SLTI-01 ... OK
Check       I-SLTIU-01 ... OK
Check        I-SLTU-01 ... OK
Check         I-SRA-01 ... OK
Check        I-SRAI-01 ... OK
Check         I-SRL-01 ... OK
Check        I-SRLI-01 ... OK
Check         I-SUB-01 ... OK
Check          I-SW-01 ... OK
Check         I-XOR-01 ... OK
Check        I-XORI-01 ... OK
--------------------------------
OK: 49/49

jserv · 2020-02-16T08:59:46Z

emu-rv32i.c

@@ -160,12 +160,18 @@ int machine_running = TRUE;
 #define PRV_H 2
 #define PRV_M 3

+/* Instruction state*/


Don't change here.

jserv · 2020-02-16T08:59:56Z

emu-rv32i.c

 /* CPU state */
 uint32_t pc;
 uint32_t next_pc;
 uint32_t insn;
 uint32_t reg[32];

+


Don't do this.

jserv · 2020-02-16T17:23:01Z

README.md

+- RV32M and RV32A instructions may be enabled by commenting `#define STRICT_RV32I`.
+
+
+Passed RV32C compliance tests from https://github.com/riscv/riscv-compliance


Don't mention RV32C within this pull request.

jserv · 2020-02-16T17:23:45Z

CSRs.h

@@ -0,0 +1,22 @@
+#include <stdint.h>
+


I suppose it is necessary to have file CSRs.h for conformance test, right?

jserv · 2020-02-24T15:53:51Z

any progress?

eriktai · 2020-03-07T10:17:50Z

Sorry, It's been a while for not updating this PR.
Except I will delete the CSR.h file which is not necessary for this conformance test.
My integrity of conformance tests is doing right?
After this, I want to output a detailed log file the same as other simulators.

jserv · 2020-03-07T17:44:34Z

Sorry, It's been a while for not updating this PR.
Except I will delete the CSR.h file which is not necessary for this conformance test.
My integrity of conformance tests is doing right?
After this, I want to output a detailed log file the same as other simulators.

So far, your changes work out-of-box except the inconsistency I mentioned earlier.

jserv and others added 11 commits January 20, 2020 22:01

Perform consistent indention

25e917c

Create the CSRs.h for CSR

275aa51

Add the compressed C.NOP and C.ADDI

5b853e5

Add the C.JAL and C.ADDIW insn

7a9c406

Modified some implementataion detail to support compressed instruction

dc68602

Add the new function for signature validation

6331c15

Modified the gitignore

5b143f9

Update README.txt

25705a3

Add the method of how to test file

Update README.txt

5036e85

Modified the makefile to enable to check the validation

965e0d8

Update README.md

3ce2880

eriktai force-pushed the con-tests branch from 364bbb6 to d0c8ddc Compare January 23, 2020 12:13

jserv reviewed Jan 23, 2020

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f74064054@mail.ncku.edu.tw added 2 commits January 24, 2020 13:39

Finish the test for rv32i comformance tests

5b770af

I have modified the emu-rv32i for supporting riscv-compliance test-suite. However, it is needed to copy the makefile.include to the specified directory which is explained in README.md.

Format all files with postfix c and h

a4a2aa2

eriktai force-pushed the con-tests branch from d0c8ddc to a4a2aa2 Compare January 24, 2020 05:41

jserv reviewed Feb 6, 2020

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emu-rv32i.c Outdated

rs2 = (insn >> 20) & 0x1f;

}

#ifdef RV32C

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jserv Feb 6, 2020

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Ditto. No RV32C related code in this pull request.

jserv changed the title ~~The new pull request for rv32i conformance tests~~ Integrate rv32i conformance tests Feb 15, 2020

Remove RV32C specific codes

fd0dbd9

f74064054@mail.ncku.edu.tw added 4 commits February 16, 2020 15:32

Remove unnecessary comments

e34f0f4

Modify the conformance test command line

a3a7294

Put rv32emu folder into riscv-target

d30d12b

Slightly modify README.md

a90eeec

jserv reviewed Feb 16, 2020

View reviewed changes

emu-rv32i.c

/* CPU state */

uint32_t pc;

uint32_t next_pc;

uint32_t insn;

uint32_t reg[32];

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jserv Feb 16, 2020

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Don't do this.

Remove specific codes for RV32C

1d5aa67

jserv reviewed Feb 16, 2020

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CSRs.h

@@ -0,0 +1,22 @@

#include <stdint.h>

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jserv Feb 16, 2020

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I suppose it is necessary to have file CSRs.h for conformance test, right?

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Integrate rv32i conformance tests #6

Integrate rv32i conformance tests #6

eriktai commented Jan 22, 2020

jserv commented Jan 22, 2020

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jserv commented Feb 6, 2020

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jserv Feb 16, 2020

jserv Feb 16, 2020

jserv Feb 16, 2020

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jserv commented Feb 24, 2020

eriktai commented Mar 7, 2020

jserv commented Mar 7, 2020

		@@ -0,0 +1,93 @@
		/* Modified by Nober <s0913768710@gmail.com>

		- RV32M and RV32A instructions may be enabled by commenting `#define STRICT_RV32I`.


		Passed RV32C compliance tests from https://github.com/riscv/riscv-compliance

Integrate rv32i conformance tests #6

Are you sure you want to change the base?

Integrate rv32i conformance tests #6

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eriktai commented Jan 22, 2020

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jserv commented Feb 15, 2020

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jserv commented Feb 24, 2020

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jserv commented Mar 7, 2020