-
Notifications
You must be signed in to change notification settings - Fork 78
DDIOTune
DDIOTune — Click element; Tune the DDIO capacity based on the input number of ways.
DDIOTune(N_WAYS, DEV [,PRINT])
Ports: none
Intel Data Direct I/O (DDIO) was introduced to improve the performance of I/O applications by mitigating expensive DRAM accesses. It transfers packets directly to the Last Level Cache (LLC), as opposed to traditional techniques that target main memory. DDIO updates a cache line, a 64-Byte chunk of a packet, if its address already available in LLC. Otherwise, it allocates the cache line in a limited portion of LLC (i.e., 2 ways in an n-way set-associative cache). This element makes it possible to tune the limited DDIO portion by configuring IIO_LLC_WAYS register in Intel processors. In addition, this element can disable DDIO for a specific PCIe device (e.g., NIC), which makes it possible to utilize limited DDIO portion more efficiently.
Increasing N_WAYS could improve the performance of I/O intensive network functions. A developer can measure the sensitvity of a network function to DDIO by comparing the performance for different N_WAYS values. For instance, N_WAYS=0 vs. N_WAYS=2.
Note that every PCIe device (e.g., NIC) can only have one instance of this element.
For more information, you can check out our paper published in ATC'20.
This element requires at least DPDK 17.11 or higher.
Arguments:
- N_WAYS — Integer. Number of DDIO ways to use. The default is 2. Passing 0 disables DDIO.
- DEV — String. PCI device address. For instace, it can be 0000:17:00.0
- PRINT — Boolean. Print cache hierarhcy information and PCIe root info. The deault is false.
DDIOTune(N_WAYS 4, DEV 0000:17:00.0, PRINT true)
Generated by click-elem2man from ../elements/research/ddiotune.hh:12 on 2022/11/25.