Skip to content
VHDL implementation of a systolic array for computing SHA-256 for Bitcoin
Branch: master
Clone or download
Latest commit 7ce1d3c Jan 20, 2017
Permalink
Type Name Latest commit message Commit time
Failed to load latest commit information.
src Initial commit. Fully functional. Apr 28, 2013
.gitignore Initial commit. Fully functional. Apr 28, 2013
README.md Update README.md Jan 19, 2017

README.md

hashpipe

Hashpipe is a SHA-256 hardware hashing engine implemented in VHDL. It is designed as a systolic array, producing one hash per clock cycle.

Performance

The core has been synthesized and simulated in Quartus II on an Altera Cyclone III 120K FPGA. Two instances fit on this device, with an Fmax of approximately 70 MHz, thus producing together 140 MHash/sec.

You can’t perform that action at this time.