A core which uses BSCAN_SPARTAN3 primitive to transfer a configuration bit-stream from JTAG to SPI.
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Updated
Nov 1, 2020 - VHDL
A core which uses BSCAN_SPARTAN3 primitive to transfer a configuration bit-stream from JTAG to SPI.
Open-Source VHDL Synthesis for Alhambra II FPGA Board
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