Verilog Codes for various digital circuits for labs at IIT Ropar, basic gates, adders & subtractors (half & full), ripple adders, multipliers and code converters.
-
Updated
May 11, 2017 - Verilog
Verilog Codes for various digital circuits for labs at IIT Ropar, basic gates, adders & subtractors (half & full), ripple adders, multipliers and code converters.
Approximate Multipliers of 8bit and 16bit operands, built with approximate compressors.
The computational speed of the dadda multiplier can be enhanced by partitioning the partial products. In process to achieve low power we have considered pass transistor for logical implementation.
Verilog Multiplier Implementation
Parameterized and 4-bit carry save multiplier design
Add a description, image, and links to the multipliers topic page so that developers can more easily learn about it.
To associate your repository with the multipliers topic, visit your repo's landing page and select "manage topics."