#
phy
Here are 3 public repositories matching this topic...
An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII,用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。
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Updated
Sep 14, 2023 - Verilog
Opensource DDR3 Controller
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Updated
Jun 29, 2024 - Verilog
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