This repository documents the learning from VSD "RTL Design Using Verilog With SKY130 Technology" workshop
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Updated
Jun 6, 2021 - Verilog
This repository documents the learning from VSD "RTL Design Using Verilog With SKY130 Technology" workshop
This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedures on how to create a custom LEF file and plugging it into an openlane flow.
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