VANAGA is an open-source tool, which optimizes the instruction-set encoding in embedded processors using a one- and multi-objective (NSGA-II) Genetic Algorithm (GA).
The VANAGA tool is described in the following paper. If you are using VANAGA, please cite it as follows:
M. Weißbrich, J. A. Moreno-Medina, and G. Payá-Vayá. "Using Genetic Algorithms to Optimize the Instruction-Set Encoding on Processor Cores". 2021 10th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2021, doi: 10.1109/MOCAST52088.2021.9493406.
The following overview should outline the configuration of the VANAGA open source tool in order to adapt to a specific application.
Clone the repository
git clone https://github.com/tubs-eis/VANAGAThe following presented files and functions have to be edited accordingly for your own application. Here, an overview of the contents and recommendations are given.
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Open the
config.pyand choose the desired optimization objectives, as well as the desired fitness to be tracked. Finally, adapt the genaral parameter of the genetic algorithm to your application. -
The
switching_simulation.pyfile contains themake_file_logic_to_memory_overwrite(),make_all_cmd()andmake_file_memory_to_logic_overwrite()functions. They are used to modify Makefiles of an external tool flow, which automatically executes logic synthesis in order to generate, e.g., silicon area values. Themake_all_cmd()function executes the external tool flow using the subprocess.Popen() method. This allows a configurable number of processes to be executed in parallel. -
Open the
hardware_synthesis.pyfile and edit thenano_pkg_vhdl_overwrite()function. This function modifies the binary encoded instruction-set encoding, written in a VHDL package, using regular expressions. Later, the file is read by the external tool flow to generate, e.g., silicon area results. The same has to be done in theswitching_simulation.pyfile, which uses thenanodefs_h_overwrite()function to overwrite the instruction-set encoding in the SystemC testbench headers (if required) in order to simulate the switching activity of an application. -
Open the
switching_activity.pyfile and edit theassembler_execution_imem_image(),assembler_execution_rom_image(),make_all_net()andmake_all_pwr(). All of these functions allow a parallel execution of a switching simulation. Adapt all these functions to your application accordingly. -
Finally, edit the
get_area_nano.pyandget_power_nano.pyfiles. Here, a variety of functions is defined, which reads in the generated silicon area and power consumption results from the generated report files of the external tool flow. This is also done using regular expressions. Furthermore, remember to edit the tracking arrays which are used to track the desired metrics locally (GA generations loop) and globally (over generations).
Once all the abovementioned configurations have been adapted to your application, run VANAGA using:
python3 main_nano.py-
With litte effort, the algorithm can be extended for the optimization of more than two objects, i.e., add a new column to the scores array containing the fitness values of the 3rd objective.
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The algorithm tracks the percentage of repeated Instruction-Set Encodings (ISE) at the end of the genetic process. A function can be built, which checks if an ISE has already been synthesised and simulated. If this is the case, remove it from the population and create a new individual (new ISE) until the new population has non-repeated individuals. This will expand the search space of the application.
- Guillermo Payá Vayá (Technische Universität Braunschweig)
- Moritz Weißbrich (Technische Universität Braunschweig)
- Javier Andrés Moreno Medina (Leibniz Universität Hannover)
This open-source project is distributed under the MIT license.
The VANAGA tool is described in the following paper. If you are using VANAGA, please cite it as follows:
M. Weißbrich, J. A. Moreno-Medina, and G. Payá-Vayá. "Using Genetic Algorithms to Optimize the Instruction-Set Encoding on Processor Cores". 2021 10th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2021, doi: 10.1109/MOCAST52088.2021.9493406.