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Add support for cosimulation with Spike #1323

Merged
merged 19 commits into from
Feb 15, 2023
Merged

Add support for cosimulation with Spike #1323

merged 19 commits into from
Feb 15, 2023

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jerryz123
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@jerryz123 jerryz123 commented Feb 2, 2023

Since spike is actively maintained and kept up-to-date with the spec, it makes more sense to use spike instead of dromajo for cosimulation.

This PR changes the chipyard-boom test to run MediumBoom+cospike (instead of SmallBoom).

This PR also removes testing esp-tools in CI. We cannot continue to guarantee that simulators will compile when using esp-isa-sim.

UPDATE: We're going to refactor the gemmini-spike fork into a dynamically loadable standalone extension that works with upstream spike. Soon we can remove the gemmini->esp-tools dependency.

Related PRs / Issues:

Type of change:

  • Bug fix
  • New feature
  • Other enhancement

Impact:

  • RTL change
  • Software change (RISC-V software)
  • Build system change
  • Other

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  • Did you set main as the base branch?
  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
  • Did you state the type-of-change/impact?
  • Did you delete any extraneous prints/debugging code?
  • Did you mark the PR with a changelog: label?
  • (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
  • (If applicable) Did you add documentation for the feature?
  • (If applicable) Did you add a test demonstrating the PR?
  • (If applicable) Did you mark the PR as Please Backport?

@jerryz123
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jerryz123 commented Feb 2, 2023

This needs riscv-software-src/riscv-isa-sim#1242
Done

@jerryz123
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There's some bug with spike's make_dtb freezing on the fork/wait on the CI machines. riscv-software-src/riscv-isa-sim#1244 will resolve this.

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jerryz123 commented Feb 6, 2023 via email

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@abejgonzalez abejgonzalez left a comment

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LGTM. Pending CI

@jerryz123
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Thanks!

@jerryz123 jerryz123 merged commit 089dbc1 into main Feb 15, 2023
@jerryz123 jerryz123 deleted the spikecosim branch February 15, 2023 23:29
@yswntht
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yswntht commented Mar 20, 2023

Hi @jerryz123 @abejgonzalez @kabylkas,

sorry to open an already closed thread. This is the latest dromajo discussion I could find. I tried dromajo with chipyard 1.6.2, 1.7.0 and 1.7.1. I see same issue, simulation fails with exit code 8191.

FAIL: Dromajo Simulation Failed with exit code: 8191

There were few old threads on dromajo fixes: #917 and #1204. I applied the fixes suggested there, but still i see same issue. Also, one other thing i noticed is chipyard stopped to track dromajo after

commit 09fbef4565429f641a7eb93f190ad0e45e11d7f8 (HEAD, origin/master)
Author: Abraham Gonzalez abe.gonzalez@berkeley.edu
Date: Wed Nov 4 19:40:41 2020 +0000

Add __STDC_FORMAT_MACROS define for old glibc versions

Here is the log:

(set -o pipefail && /root/chipyard-olddromajo/sims/vcs/simv-chipyard-DromajoBoomConfig +permissive +dramsim +dramsim_ini_dir=/root/chipyard-olddromajo/generators/testchipip/src/main/resources/dramsim2_ini +max-cycles=10000000 +drj_dtb=/root/chipyard-olddromajo/sims/vcs/generated-src/chipyard.TestHarness.DromajoBoomConfig/chipyard.TestHarness.DromajoBoomConfig.dtb +drj_rom=/root/chipyard-olddromajo/sims/vcs/generated-src/chipyard.TestHarness.DromajoBoomConfig/bootrom.rv64.img +drj_bin=./hello/hello.riscv +ntb_random_seed_automatic +verbose +permissive-off ./hello/hello.riscv </dev/null 2> >(spike-dasm > /root/chipyard-olddromajo/sims/vcs/output/chipyard.TestHarness.DromajoBoomConfig/hello.out) | tee /root/chipyard-olddromajo/sims/vcs/output/chipyard.TestHarness.DromajoBoomConfig/hello.log)
Chronologic VCS simulator copyright 1991-2018
Contains Synopsys proprietary information.
Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Mar 20 07:42 2023
NOTE: automatic random seed used: 619777783
[UART] UART0 is here (stdin/stdout).
[DRJ_INFO] Dromajo command: ./dromajo --compact_bootrom --custom_extension --clear_ids --reset_vector 0x10040 --bootrom /root/chipyard-olddromajo/sims/vcs/generated-src/chipyard.TestHarness.DromajoBoomConfig/bootrom.rv64.img --mmio_range 0x20000:0x80000000 --plic 0xC000000:0x4000000 --clint 0x2000000:0x10000 --memory_size 0x100 --save dromajo_snap --dtb /root/chipyard-olddromajo/sims/vcs/generated-src/chipyard.TestHarness.DromajoBoomConfig/chipyard.TestHarness.DromajoBoomConfig.dtb ./hello/hello.riscv
FAIL: Dromajo Simulation Failed with exit code: 8191
Fatal: "/root/chipyard-olddromajo/sims/vcs/generated-src/chipyard.TestHarness.DromajoBoomConfig/SimDromajoCosimBlackBox.v", 75: TestDriver.testHarness.dbridge.dromajo: at time 38250500 ps
$finish called from file "/root/chipyard-olddromajo/sims/vcs/generated-src/chipyard.TestHarness.DromajoBoomConfig/SimDromajoCosimBlackBox.v", line 75.
$finish at simulation time 38250500
V C S S i m u l a t i o n R e p o r t
Time: 38250500 ps
CPU Time: 10.280 seconds; Data structure size: 4.4Mb
Mon Mar 20 07:42:39 2023

/root/chipyard-olddromajo/sims/vcs/output/chipyard.TestHarness.DromajoBoomConfig/hello.out

0x000000000001005c (0x30301073) csrw mideleg, zero
3 0x0000000000010060 (0x00800513) x10 0x0000000000000008 li a0, 8
csr_read: hartid=0 csr=0x304 val=0x0
csr_write: hardid=0 csr=0x304 val=0x0000000000000008
3 0x0000000000010064 (0x30451073) csrw mie, a0
csr_read: hartid=0 csr=0x300 val=0x1800
csr_write: hardid=0 csr=0x300 val=0x0000000a00001808
3 0x0000000000010068 (0x30052073) csrs mstatus, a0
3 0x000000000001006c (0x10500073) wfi
[DEBUG] DUT raised interrupt 3
[DEBUG] Interrupt: MIP <- 3: Now MIP = 8
get_irq_mask: mip=0x8 mie=0x8 mideleg=0x0
raise_interrupt: irq=3 priv=3 pc=10070 hartid=0
hartid=0: exception interrupt #3, epc 0x0000000000010070
3 0x0000000000010000 (0x020005b7) x11 0x0000000002000000 lui a1, 0x2000
csr_read: hartid=0 csr=0xf14 val=0x0
3 0x0000000000010004 (0xf1402573) x10 0x0000000000000000 csrr a0, mhartid
3 0x0000000000010008 (0x00050463) beqz a0, pc + 8
3 0x0000000000010010 (0x00458613) x12 0x0000000002000004 addi a2, a1, 4
3 0x0000000000010014 (0x00100693) x13 0x0000000000000001 li a3, 1
clint_write: MSIP access for hartid:1 which is beyond ncpus
3 0x0000000000010018 (0x00d62023) sw a3, 0(a2)
3 0x000000000001001c (0x00460613) x12 0x0000000002000008 addi a2, a2, 4
clint_read: MSIP access for hartid:1 which is beyond ncpus
3 0x0000000000010020 (0xffc62683) x13 0x0000000000000000 lw a3, -4(a2)
3 0x0000000000010024 (0xfe069ae3) bnez a3, pc - 12
3 0x0000000000010028 (0x06c0006f) j pc + 0x6c
3 0x0000000000010094 (0x0005a023) sw zero, 0(a1)
3 0x0000000000010098 (0x00004537) x10 0x0000000000004000 lui a0, 0x4
bootrom_device_read: offset=0 size_log2=2
bootrom_device_read: offset=4 size_log2=2
3 0x000000000001009c (0x00053503) x10 0x8000000080000000 ld a0, 0(a0)
[error] EMU PC 000000000001009c, DUT PC 000000000001009c
[error] EMU INSN 00053503, DUT INSN 00053503
[error] EMU WDATA 8000000080000000, DUT WDATA 0000000080000000
[error] EMU MSTATUS a00001880, DUT MSTATUS 00000000

can you please suggest any work around for this? or an older chipyard release that tests dromajo?

Thanks.

@jimmysitu
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Hi All,
I got the same issue with 1.9.1 chipyard, does dromajo drop by chipyard?

@jimmysitu jimmysitu mentioned this pull request Jun 14, 2023
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4 participants