Fix schedcoop idling and x86 timer interrupts

[FedeParola]

Prerequisite checklist

• Read the contribution guidelines regarding submitting new changes to the project;
• Tested your changes against relevant architectures and platforms;
• Ran the checkpatch.uk on your commit series before opening this PR;
• Updated relevant documentation.

Base target

• Architecture(s): x86_64
• Platform(s): kvm
• Application(s): N/A

Additional configuration

Description of changes

880f27c fixes a problem in ukschedcoop in which the idle thread keeps busy looping instead of halting the cpu when no wakeup time is set (i.e., wake_up_time == 0). To test the problem simply apply app-helloworld-diff.txt to the helloworld application (the diff causes the main thread to block) and run it. You will see the CPU usage at 100%.

655ea17 fixes a problem in which the i8254 timer doesn't switch completely to software-triggered strobe in the init function. To switch the i8254 to sw-triggered strobe mode a value must be written into the counter. Previously the timer remained in rate generator mode and kept generating interrupts until the counter was written (e.g., for a sleep()). To test add some debug message in the timer interrupt ISR and run the previous modified helloworld, you will see a lot of interrupts are triggered. E.g., time-diff.txt.

[razvand]

Nice fixes, @FedeParola. I will use your test programs to validate the solution, but, just by browsing the code, it makes sense.

I would ask you to start the commit messages with capital letter in the two commits of this PR, i.e. Fix idling without wakeup time (capital F) and Switch i8254 to sw-triggered strobe on init (capital S).

@mschlumpp, @mogasergiu, @skuenzer, @marcrittinghaus, please also take a look.

[unikraft-bot]

✅ Checkpatch passed

Beep boop! I ran Unikraft's checkpatch.pl support script on your pull request and it all looks good!

SHA	commit	checkpatch
880f27c	lib/ukschedcoop: Fix idling without wakeup time	✅
655ea17	plat/kvm/x86/tscclock: Switch i8254 to sw-triggered strobe on init	✅

[razvand]

Hi, @FedeParola. I tested and, indeed, the problems are as you mentioned and the solutions as you provided. I'm approving this PR.

We'll wait for an approval step from @skuenzer. At that point, I will also add the reviewer tag, conforming to Unikraft's review process.

I've one question related to the i8254 sw-triggered configuration. Why are two writes (outb) required to TIMER_CNTR? Indeed, I tried only using on write (outb) but it did not work.

[FedeParola]

Hi @razvand and thanks for the review. The i8254 has a 16 bit counter, but the register to program it is only 8 bit, so two outb are needed to perform a complete write. It is also possible to configure the timer to only input the high or low 8 bits of the counter (remaining bits are automatically set to 0), but keeping the two steps configuration allows later configurations to retain full resolution.

[skuenzer]

Dear @FedeParola,

a well explained PR with good code examples. Thanks for these fixes!

Approved-by: Simon Kuenzer simon@unikraft.io

[razvand]

Reviewed-by: Razvan Deaconescu razvand@unikraft.io