Implementation of partly parallel LDPC code decoder in Verilog.
Implemented the architecture proposed in this paper
-
Notifications
You must be signed in to change notification settings - Fork 3
Implementation of partly parallel LDPC code decoder in Verilog.
License
vaithak/LDPC-Code-Decoder
Folders and files
| Name | Name | Last commit message | Last commit date | |
|---|---|---|---|---|
Repository files navigation
About
Implementation of partly parallel LDPC code decoder in Verilog.
Resources
License
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published