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How to read/write internal signals from gate level #2902

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RuochenDai78 opened this issue Apr 21, 2021 · 1 comment
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How to read/write internal signals from gate level #2902

RuochenDai78 opened this issue Apr 21, 2021 · 1 comment
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resolution: answered Closed; only applies to questions which were answered

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@RuochenDai78
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Hello

Here is my question: for example, there is reg [2:0] a in the RTL code, and after mapping it into gate-level, three DFFs are used to hold a[0], a[1] and a[2] and a is declared as wire type. Then how can I access a in the cpp wrapper?

Thanks

@RuochenDai78 RuochenDai78 added the new New issue not seen by maintainers label Apr 21, 2021
@wsnyder wsnyder added resolution: answered Closed; only applies to questions which were answered and removed new New issue not seen by maintainers labels Apr 21, 2021
@wsnyder
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wsnyder commented Apr 21, 2021

Please see https://verilator.org/guide/latest/faq.html#how-do-i-access-signals-in-c

Closing as hopefully that answers it, feel free to post a followup question here.

@wsnyder wsnyder closed this as completed Apr 21, 2021
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Labels
resolution: answered Closed; only applies to questions which were answered
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