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JTAG boundary scan debug & test tool.
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jtag_boundary_scanner_gui/win32 some fixes in the help window. Mar 4, 2019
lib_jtag_core Compute the FT2232 clock divisor. Jul 3, 2019
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README.md comment about jlink probes support. Mar 1, 2019
Release-notes.txt Probes selection fixed. Mar 1, 2019

README.md

JTAG Boundary Scanner logo

JTAG Boundary Scanner

JTAG Boundary-scan board debugging/test software

The JTAG Boundary Scanner is a JTAG software tool to debug or test any electronic boards with a JTAG interface.

JTAG Boundary Scanner software

Main characteristics and features

  • Windows version GUI.

  • Implemented in C.

  • BSDL files support.

  • Target IO pins sampling and control mode ( SAMPLE & EXTEST ).

  • I2C Bus over JTAG emulation.

  • SPI Bus over JTAG emulation.

  • MDIO Bus over JTAG emulation.

  • Parallel port bus over JTAG emulation.

  • JTAG Bus scan and devices auto-detection.

  • BSDL files auto-load.

  • script support.

  • socket interface for remote control.

Supported Probes

  • FTDI FT2232H based JTAG probes support (Olimex ARM-USB_OCD-H, Lattice HW-USBN-2B, Xilinx...).

  • JLINK JTAG probes support. Note : JLinkARM.dll need to be copied into the JTAGBoundaryScanner folder for the JLink probes support.

  • Parallel port based JTAG probes support (Altera ByteBlaster, Memec IJC-4, Macgraigor Wiggler).

License

This project is licensed under the GNU General Public License version 3 - see the LICENSE file for details

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