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This is a collection of works on neural networks and neural accelerators.

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Neural-Networks-on-Chip

My name is Shubo Liu.I am currently pursuing a master's degree in computer science and technology from Capital Normal University, Beijing, China. One of my research interests is the architectural design of deep learning. This is an exciting area where fresh ideas come up every day, so I am collecting works on related topics! I will list the source and download address of the papers as much as possible, and I will also comment on some papers I have read. If you are also interested in this topic, welcome to study together!

  • Conference Papers
    • 2015: ISCA, ASPLOS, FPGA, DAC
    • 2016: ISSCC, ISCA, MICRO, HPCA, DAC, FPGA, ICCAD, DATE, ASPDAC, VLSI, FPL
    • 2017: ISSCC, ISCA, MICRO, HPCA, ASPLOS, DAC, FPGA, ICCAD, DATE, VLSI
    • 2018: ISSCC, ISCA, MICRO, HPCA, ASPLOS, DAC, FPGA, ICCAD, DATE, ASPDAC

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This is a collection of works on neural networks and neural accelerators.

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