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perf/x86/amd/lbr: Discard erroneous branch entries
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The Revision Guide for AMD Family 19h Model 10-1Fh processors declares
Erratum 1452 which states that non-branch entries may erroneously be
recorded in the Last Branch Record (LBR) stack with the valid and
spec bits set.

Such entries can be recognized by inspecting bit 61 of the corresponding
LastBranchStackToIp register. This bit is currently reserved but if found
to be set, the associated branch entry should be discarded.

Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://bugzilla.kernel.org/attachment.cgi?id=305518
Link: https://lore.kernel.org/r/3ad2aa305f7396d41a40e3f054f740d464b16b7f.1706526029.git.sandipan.das@amd.com
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sandip4n authored and Ingo Molnar committed Mar 13, 2024
1 parent b29f377 commit 29297ff
Showing 1 changed file with 4 additions and 2 deletions.
6 changes: 4 additions & 2 deletions arch/x86/events/amd/lbr.c
Original file line number Diff line number Diff line change
Expand Up @@ -173,9 +173,11 @@ void amd_pmu_lbr_read(void)

/*
* Check if a branch has been logged; if valid = 0, spec = 0
* then no branch was recorded
* then no branch was recorded; if reserved = 1 then an
* erroneous branch was recorded (see Erratum 1452)
*/
if (!entry.to.split.valid && !entry.to.split.spec)
if ((!entry.to.split.valid && !entry.to.split.spec) ||
entry.to.split.reserved)
continue;

perf_clear_branch_entry_bitfields(br + out);
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