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The ASRC and SSRC tests to check for max absolute sample-wise diff instead of bit-exactness for VPU cases. The max sample diff is 33, so just over 5 bits. The MIPS log also shows the over 2x reduction in ASRC MIPS.
However, looking at the characterisation plots, the typical figure is around 1-3dB degradation for most plots where the baseline is ~130dB SNR and only higher numbers than that where original SNR was 150+ (eg. 1:1 ratio cases). So the overall numbers are around 130dB SNR which is extremely good.
The option now exists for the user to disable VPU in the project so just logging this issue for completeness.
The docs should be updated however to explain this tradeoff (how to do it) and update with the new numbers.
The text was updated successfully, but these errors were encountered:
The ASRC and SSRC tests to check for max absolute sample-wise diff instead of bit-exactness for VPU cases. The max sample diff is 33, so just over 5 bits. The MIPS log also shows the over 2x reduction in ASRC MIPS.
However, looking at the characterisation plots, the typical figure is around 1-3dB degradation for most plots where the baseline is ~130dB SNR and only higher numbers than that where original SNR was 150+ (eg. 1:1 ratio cases). So the overall numbers are around 130dB SNR which is extremely good.
The option now exists for the user to disable VPU in the project so just logging this issue for completeness.
The docs should be updated however to explain this tradeoff (how to do it) and update with the new numbers.
The text was updated successfully, but these errors were encountered: