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map::at: key not found #66
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With a similar but larger design, I have also gotten this error
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Adding next lines at line 161 of route.cc show the routing issue. if (chipdb->tile_nets[t].find(tile_net_name) == chipdb->tile_nets[t].end()) Thing is that lutff_7/lout does not exist in chipdb (it only exists for lutff_0 till lutff_6), and guess it that is how it is on real hardware as well, but would be good if @cliffordwolf can confirm that is valid. |
Can you create a PR for this?
Yes, this is correct afaik. The |
Sure, just made it now. |
When trying to route a design using LUT instantiation, I get this error:
Does arachne-pnr not support cascading LUTs via the LO port of ICESTORM_LC? I've tried it with both I0 and I2, and it errors both times.
Test case:
test.v:
test.pcf:
built with:
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