drivers: sdhc: add support for using CPOL/CPHA SPI clock modes

Make it possible to use CPOL/CPHA SPI clock modes with the SDHC driver.
Some cards require the clock to switch to low when not active.

Signed-off-by: Łukasz Hejnak (LeHack) <lehack-ghub@lehack.pl>

Author: LeHack

drivers/sdhc/sdhc_spi.c

@@ -768,7 +768,10 @@ static struct sdhc_driver_api sdhc_spi_api = {
 										\
 	struct sdhc_spi_data sdhc_spi_data_##n = {				\
 		.cfg_a = SPI_CONFIG_DT_INST(n,					\
-				(SPI_LOCK_ON | SPI_HOLD_ON_CS | SPI_WORD_SET(8)),\
+				(SPI_LOCK_ON | SPI_HOLD_ON_CS | SPI_WORD_SET(8) \
+				 | (DT_INST_PROP(n, spi_clock_mode_cpol) ? SPI_MODE_CPOL : 0) \
+				 | (DT_INST_PROP(n, spi_clock_mode_cpha) ? SPI_MODE_CPHA : 0) \
+				),\
 				0),						\
 	};									\
 										\

dts/bindings/sdhc/zephyr,sdhc-spi-slot.yaml

@@ -13,4 +13,18 @@ properties:
       delay gives the card time to power up or down fully. It can be increased
       if you observe issues initializing your card.
 
+  spi-clock-mode-cpol:
+    type: boolean
+    description: |
+      Clock polarity to use for SPI SDHC. Some cards respond properly
+      only when the clock goes low when not active.
+
+  spi-clock-mode-cpha:
+    type: boolean
+    description: |
+      Clock phase: this dictates when is the data captured, and depends
+      on the clock's polarity. When mode-cpol is set and this option as well,
+      capture will occur on low to high transition and high to low if
+      this option is not set (default).
+
 bus: sd

samples/subsys/fs/fat_fs/boards/nucleo_f429zi.conf

@@ -0,0 +1,2 @@
+CONFIG_SPI=y
+CONFIG_DISK_DRIVER_SDMMC=y

samples/subsys/fs/fat_fs/boards/nucleo_f429zi.overlay

@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2023 Łukasz Hejnak (LeHack) <lehack-ghub@lehack.pl>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&spi1 {
+        sdhc0: sdhc@0 {
+                compatible = "zephyr,sdhc-spi-slot";
+                reg = <0>;
+                status = "okay";
+                mmc {
+                    compatible = "zephyr,sdmmc-disk";
+                    status = "okay";
+                };
+                spi-max-frequency = <25000000>;
+                spi-clock-mode-cpol;
+                spi-clock-mode-cpha;
+        };
+};