|
| 1 | +/* |
| 2 | + * Copyright (c) 2023 Gerson Fernando Budke <nandojve@gmail.com> |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#define DT_DRV_COMPAT atmel_sam_pmc |
| 8 | + |
| 9 | +#include <stdint.h> |
| 10 | + |
| 11 | +#include <zephyr/arch/cpu.h> |
| 12 | +#include <zephyr/device.h> |
| 13 | +#include <zephyr/devicetree.h> |
| 14 | +#include <zephyr/drivers/clock_control.h> |
| 15 | +#include <zephyr/drivers/clock_control/atmel_sam_pmc.h> |
| 16 | + |
| 17 | +#include <zephyr/logging/log.h> |
| 18 | +LOG_MODULE_REGISTER(clock_control, CONFIG_CLOCK_CONTROL_LOG_LEVEL); |
| 19 | + |
| 20 | +static int atmel_sam_clock_control_on(const struct device *dev, |
| 21 | + clock_control_subsys_t sys) |
| 22 | +{ |
| 23 | + ARG_UNUSED(dev); |
| 24 | + |
| 25 | + const struct atmel_sam_pmc_config *cfg = (const struct atmel_sam_pmc_config *)sys; |
| 26 | + |
| 27 | + if (cfg == NULL) { |
| 28 | + LOG_ERR("The PMC config can not be NULL."); |
| 29 | + return -ENXIO; |
| 30 | + } |
| 31 | + |
| 32 | + LOG_DBG("Type: %x, Id: %d", cfg->clock_type, cfg->peripheral_id); |
| 33 | + |
| 34 | + switch (cfg->clock_type) { |
| 35 | + case PMC_TYPE_PERIPHERAL: |
| 36 | + soc_pmc_peripheral_enable(cfg->peripheral_id); |
| 37 | + break; |
| 38 | + default: |
| 39 | + LOG_ERR("The PMC clock type is not implemented."); |
| 40 | + return -ENODEV; |
| 41 | + } |
| 42 | + |
| 43 | + return 0; |
| 44 | +} |
| 45 | + |
| 46 | +static int atmel_sam_clock_control_off(const struct device *dev, |
| 47 | + clock_control_subsys_t sys) |
| 48 | +{ |
| 49 | + ARG_UNUSED(dev); |
| 50 | + |
| 51 | + const struct atmel_sam_pmc_config *cfg = (const struct atmel_sam_pmc_config *)sys; |
| 52 | + |
| 53 | + if (cfg == NULL) { |
| 54 | + LOG_ERR("The PMC config can not be NULL."); |
| 55 | + return -ENXIO; |
| 56 | + } |
| 57 | + |
| 58 | + LOG_DBG("Type: %x, Id: %d", cfg->clock_type, cfg->peripheral_id); |
| 59 | + |
| 60 | + switch (cfg->clock_type) { |
| 61 | + case PMC_TYPE_PERIPHERAL: |
| 62 | + soc_pmc_peripheral_disable(cfg->peripheral_id); |
| 63 | + break; |
| 64 | + default: |
| 65 | + LOG_ERR("The PMC clock type is not implemented."); |
| 66 | + return -ENODEV; |
| 67 | + } |
| 68 | + |
| 69 | + return 0; |
| 70 | +} |
| 71 | + |
| 72 | +static int atmel_sam_clock_control_get_rate(const struct device *dev, |
| 73 | + clock_control_subsys_t sys, |
| 74 | + uint32_t *rate) |
| 75 | +{ |
| 76 | + ARG_UNUSED(dev); |
| 77 | + |
| 78 | + const struct atmel_sam_pmc_config *cfg = (const struct atmel_sam_pmc_config *)sys; |
| 79 | + |
| 80 | + if (cfg == NULL) { |
| 81 | + LOG_ERR("The PMC config can not be NULL."); |
| 82 | + return -ENXIO; |
| 83 | + } |
| 84 | + |
| 85 | + LOG_DBG("Type: %x, Id: %d", cfg->clock_type, cfg->peripheral_id); |
| 86 | + |
| 87 | + switch (cfg->clock_type) { |
| 88 | + case PMC_TYPE_PERIPHERAL: |
| 89 | + *rate = SOC_ATMEL_SAM_MCK_FREQ_HZ; |
| 90 | + break; |
| 91 | + default: |
| 92 | + LOG_ERR("The PMC clock type is not implemented."); |
| 93 | + return -ENODEV; |
| 94 | + } |
| 95 | + |
| 96 | + LOG_DBG("Rate: %d", *rate); |
| 97 | + |
| 98 | + return 0; |
| 99 | +} |
| 100 | + |
| 101 | +static enum clock_control_status |
| 102 | +atmel_sam_clock_control_get_status(const struct device *dev, |
| 103 | + clock_control_subsys_t sys) |
| 104 | +{ |
| 105 | + ARG_UNUSED(dev); |
| 106 | + |
| 107 | + const struct atmel_sam_pmc_config *cfg = (const struct atmel_sam_pmc_config *)sys; |
| 108 | + enum clock_control_status status; |
| 109 | + |
| 110 | + if (cfg == NULL) { |
| 111 | + LOG_ERR("The PMC config can not be NULL."); |
| 112 | + return -ENXIO; |
| 113 | + } |
| 114 | + |
| 115 | + LOG_DBG("Type: %x, Id: %d", cfg->clock_type, cfg->peripheral_id); |
| 116 | + |
| 117 | + switch (cfg->clock_type) { |
| 118 | + case PMC_TYPE_PERIPHERAL: |
| 119 | + status = soc_pmc_peripheral_is_enabled(cfg->peripheral_id) > 0 |
| 120 | + ? CLOCK_CONTROL_STATUS_ON |
| 121 | + : CLOCK_CONTROL_STATUS_OFF; |
| 122 | + break; |
| 123 | + default: |
| 124 | + LOG_ERR("The PMC clock type is not implemented."); |
| 125 | + return -ENODEV; |
| 126 | + } |
| 127 | + |
| 128 | + return status; |
| 129 | +} |
| 130 | + |
| 131 | +static struct clock_control_driver_api atmel_sam_clock_control_api = { |
| 132 | + .on = atmel_sam_clock_control_on, |
| 133 | + .off = atmel_sam_clock_control_off, |
| 134 | + .get_rate = atmel_sam_clock_control_get_rate, |
| 135 | + .get_status = atmel_sam_clock_control_get_status, |
| 136 | +}; |
| 137 | + |
| 138 | +static int atmel_sam_clock_control_init(const struct device *dev) |
| 139 | +{ |
| 140 | + ARG_UNUSED(dev); |
| 141 | + |
| 142 | + return 0; |
| 143 | +} |
| 144 | + |
| 145 | +DEVICE_DT_INST_DEFINE(0, atmel_sam_clock_control_init, |
| 146 | + NULL, |
| 147 | + NULL, |
| 148 | + NULL, |
| 149 | + PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, |
| 150 | + &atmel_sam_clock_control_api); |
0 commit comments