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boards: arm: efr32bg27_brd2602: Initial support
Adds initial support for efr32bg27_brd2602 - Thunderboard-style board. Supported features are: * counter * gpio * uart Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
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‎boards/arm/efr32_thunderboard/Kconfig.board

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@@ -7,3 +7,8 @@ config BOARD_EFR32BG_SLTB010A
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bool "SiLabs EFR32BG-SLTB010A (Thunderboard EFR32BG22)"
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depends on SOC_SERIES_EFR32BG22
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select SOC_PART_NUMBER_EFR32BG22C224F512IM40
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config BOARD_EFR32BG27_BRD2602A
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bool "SiLabs EFR32BG27C140F768IM40 (EFR32BG27 +8 dBm Dev Kit Board)"
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depends on SOC_SERIES_EFR32BG27
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select SOC_PART_NUMBER_EFR32BG27C140F768IM40

‎boards/arm/efr32_thunderboard/Kconfig.defconfig

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endif # BOARD_EFR32BG_SLTB010A
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if BOARD_EFR32BG27_BRD2602A
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config BOARD
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default "efr32bg27_brd2602a"
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endif # BOARD_EFR32BG27_BRD2602A
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config CMU_HFXO_FREQ
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default 40000000
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config CMU_LFXO_FREQ
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default 32768
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<<<<<<< HEAD
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if BT
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@@ -34,3 +42,5 @@ endchoice
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endif # BT
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endif # BOARD_EFR32BG_SLTB010A
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=======
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>>>>>>> 4a57ca65b7 (boards: arm: efr32bg27_brd2602: Initial support)

‎boards/arm/efr32_thunderboard/efr32bg27_brd2602a.dts

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/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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/* TODO: Adapt GPIO to BG27 instead of using BG22 DTSi */
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#include <silabs/efr32bg27.dtsi>
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#include <silabs/efr32bg22-pinctrl.dtsi>
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#include "thunderboard.dtsi"
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/ {
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model = "Silicon Labs EFR32BG27C140F768IM40 Thunderboard-style board";
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compatible = "silabs,efr32bg27c140f768im40", "silabs,efr32bg27";
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/* These aliases are provided for compatibility with samples */
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aliases {
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led0 = &led0;
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sw0 = &button0;
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i2c-pin = &i2c_pin;
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spi-flash0 = &mx25r80;
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spi0 = &usart0;
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watchdog0 = &wdog0;
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};
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leds {
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compatible = "gpio-leds";
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led0: led_0 {
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gpios = <&gpioa GECKO_PIN(4) GPIO_ACTIVE_HIGH>;
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label = "LED 0";
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};
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};
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};
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&flash0 {
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partitions {
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/* Reserve 32 kB for the bootloader */
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x0 0x00008000>;
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read-only;
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};
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/* Reserve 320 kB for the application in slot 0 */
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slot0_partition: partition@8000 {
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label = "image-0";
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reg = <0x00008000 0x00050000>;
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};
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/* Reserve 320 kB for the application in slot 1 */
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slot1_partition: partition@58000 {
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label = "image-1";
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reg = <0x00058000 0x00050000>;
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};
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/* Reserve 32 kB for the scratch partition */
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scratch_partition: partition@a8000 {
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label = "image-scratch";
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reg = <0x000a8000 0x00008000>;
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};
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/* Set 64Kb of storage at the end of the 768KB of flash */
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storage_partition: partition@b0000 {
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label = "storage";
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reg = <0x000b0000 0x00010000>;
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};
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};
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};
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&usart0 {
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interrupts = <16 0>, <17 0>;
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interrupt-names = "rx", "tx";
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};
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&usart1 {
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interrupts = <18 0>, <19 0>;
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interrupt-names = "rx", "tx";
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};

‎boards/arm/efr32_thunderboard/efr32bg27_brd2602a.yaml

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identifier: efr32bg27_brd2602a
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name: EFR32BG27_BRD2602A
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type: mcu
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arch: arm
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ram: 64
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flash: 768
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toolchain:
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- zephyr
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- gnuarmemb
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- xtools
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supported:
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- counter
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- gpio
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- uart
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testing:
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ignore_tags:
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- net
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- bluetooth

‎boards/arm/efr32_thunderboard/efr32bg27_brd2602a_defconfig

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# SPDX-License-Identifier: Apache-2.0
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CONFIG_ARM_MPU=y
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CONFIG_SOC_SERIES_EFR32BG27=y
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CONFIG_BOARD_EFR32BG27_BRD2602A=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=76800000
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CONFIG_CMU_HFCLK_HFXO=y
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CONFIG_SOC_GECKO_EMU_DCDC=y
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CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
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CONFIG_HW_STACK_PROTECTION=y
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CONFIG_CMU_HFCLK_HFRCO=y
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CONFIG_PINCTRL=y

‎drivers/gpio/gpio_gecko.c

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#define GET_GECKO_GPIO_INDEX(id) DT_INST_PROP(id, peripheral_id)
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#else
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#if defined(CONFIG_SOC_SERIES_EFR32BG22) || \
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defined(CONFIG_SOC_SERIES_EFR32BG27) || \
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defined(CONFIG_SOC_SERIES_EFR32MG21) || \
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defined(CONFIG_SOC_SERIES_EFR32MG24)
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#define GECKO_GPIO_PORT_ADDR_SPACE_SIZE sizeof(GPIO_PORT_TypeDef)
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#else
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#define GECKO_GPIO_PORT_ADDR_SPACE_SIZE sizeof(GPIO_P_TypeDef)
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#endif /* defined(CONFIG_SOC_SERIES_EFM32HG) || defined(CONFIG_SOC_SERIES_EFM32WG) */
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#endif
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/* Assumption for calculating gpio index:
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* 1. Address space of the first GPIO port is the address space for GPIO port A
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*/

‎dts/arm/silabs/efr32bg27.dtsi

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/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "efr32bg2x.dtsi"
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#include <mem.h>
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/ {
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soc {
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stimer0: stimer@50048000 {
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compatible = "silabs,gecko-stimer";
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reg = <0x50048000 0x3054>;
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interrupts = <12 0>;
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clock-frequency = <32768>;
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prescaler = <1>;
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status = "disabled";
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};
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};
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&gpio {
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interrupts = <30 2 31 2>;
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};
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&i2c0 {
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interrupts = <32 0>;
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};
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&i2c1 {
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interrupts = <33 0>;
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};
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‎soc/arm/silabs_exx32/efr32bg27/Kconfig.defconfig.efr32bg27

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# Silicon Labs EFR32BG27 (Blue Gecko) MCU configuration options
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# Copyright (c) 2023 Antmicro <www.antmicro.com>
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# SPDX-License-Identifier: Apache-2.0
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config GPIO_GECKO
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default y
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config SOC_FLASH_GECKO
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default n

‎soc/arm/silabs_exx32/efr32bg27/Kconfig.defconfig.series

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# Silicon Labs EFR32BG27 (Blue Gecko) MCU configuration options
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# Copyright (c) 2023 Antmicro <www.antmicro.com>
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# SPDX-License-Identifier: Apache-2.0
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if SOC_SERIES_EFR32BG27
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config SOC_SERIES
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default "efr32bg27"
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config SOC_PART_NUMBER
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default "EFR32BG27C140F768IM40" if SOC_PART_NUMBER_EFR32BG27C140F768IM40
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config NUM_IRQS
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# must be >= the highest interrupt number used
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default 66
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config PM
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select COUNTER
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source "soc/arm/silabs_exx32/efr32bg27/Kconfig.defconfig.efr32bg27"
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endif # SOC_SERIES_EFR32BG27

‎soc/arm/silabs_exx32/efr32bg27/Kconfig.series

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# Silicon Labs EFR32BG27 (Blue Gecko) MCU
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# Copyright (c) Antmicro 2023 <www.antmicro.com>
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_EFR32BG27
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bool "EFR32BG27 Series MCU"
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select ARM
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select ARMV8_M_DSP
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select ARM_TRUSTZONE_M
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select CPU_CORTEX_M33
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select CPU_HAS_ARM_MPU
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select CPU_HAS_ARM_SAU
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select CPU_HAS_FPU
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select HAS_SILABS_GECKO
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select HAS_SWO
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select SOC_FAMILY_EXX32
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select SOC_GECKO_CMU
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select SOC_GECKO_CORE
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select SOC_GECKO_DEV_INIT
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help
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Enable support for EFR32BG27 Blue Gecko MCU series

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