I am Ivan, I'm currently working on VLSI design, FPGA development, Formal and UVM verification. In accordance those topics I am implementing an 8-bit RISC processor on a DE10-lite board.
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8-bitRISC-proc
8-bitRISC-proc Public8-bit single cycle RISC processor using the MIPS architecture. Effectively done, last step is synthesis for now.
SystemVerilog
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SRAM-Layout
SRAM-Layout PublicSRAM VLSI layout and circuit files used to optimize bitlines and transistors for maximum performance and minimal space occupied. Uses a 50nm CMOS model from CMOSedu.com.
Raku
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