Support for ST STM32 NUCLEO-G431KB Development Board #13979

taunomagnusson · 2020-11-27T22:50:57Z

Summary of changes

Adding support for ST STM32 NUCLEO-G431KB Development Board

Impact of changes

Not applicable

Migration actions required

Not applicable

Documentation

None

Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[] Covered by existing mbed-os tests (Greentea or Unittest)
[X] Tests / results supplied as part of this PR


Passes all "mbed test" tests (mbedgt: test case results: 709 OK)
Verified on HW:
    Blinky program (using LD1 Onboard LED)
    GPIO Ports
    USB Device
    USART
Other Information
    Uses HSI Clock. (HSI is default for NUCLEO G431KB board - solder bridge is needed to enable HSE)
    USB connected to HSI48 Clock.

mbed_test_report.txt

Reviewers

@jeromecoutant

ciarmcom · 2020-11-27T23:00:25Z

@taunomagnusson, thank you for your changes.
@jeromecoutant @ARMmbed/team-st-mcd @ARMmbed/mbed-os-maintainers please review.

0xc0170

Can you also update CMakelists.txt file? I assume one should be added to STM32G4 folder where we select this 431 target, plus also new CMakelists to TARGET_STM32G431xB. This should help you ARMmbed/mbed-os-5-docs#1381 (will be integrated soon to be available publicly in docs).

README.md

Pull request has been modified.

taunomagnusson · 2020-12-02T00:56:13Z

Hi, Ok: - Modified CMakeLists.txt for TARGET_STM32G431xB to include TARGET_NUCLEO_G431KB - Created CMakesLists.txt for TARGET_NUCLEO_G431KB - Rebased to latest ARMmbed/mbed-os master - Reverted README.md to original version.

…

On Mon, Nov 30, 2020 at 9:59 AM Martin Kojtal ***@***.***> wrote: ***@***.**** requested changes on this pull request. Can you also update CMakelists.txt file? I assume one should be added to STM32G4 folder where we select this 431 target, plus also new CMakelists to TARGET_STM32G431xB. This should help you ARMmbed/mbed-os-5-docs#1381 <ARMmbed/mbed-os-5-docs#1381> (will be integrated soon to be available publicly in docs). ------------------------------ In README.md <#13979 (comment)>: > @@ -1,48 +1,30 @@ -[![Mbed OS][mbed-os-logo]][mbed-os-link] +README.md Can you revert Readme changes, it should not be part of target addition. — You are receiving this because you were mentioned. Reply to this email directly, view it on GitHub <#13979 (review)>, or unsubscribe <https://github.com/notifications/unsubscribe-auth/AQVIPAS33P2OZU5YLGVGMMDSSNNI3ANCNFSM4UFLY3HQ> .

targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/CMSIS/stm32g431xx.h

targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TARGET_NUCLEO_G431KB/PeripheralPins.c

targets/targets.json

jeromecoutant

For PeripheralsPins.c, try #13992 :-)

python targets/TARGET_STM/tools/STM32_gen_PeripheralPins.py -t M40_Nucleo_NUCLEO-G431KB

targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/CMSIS/stm32g431xx.h

targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TARGET_NUCLEO_G431KB/PeripheralPins.c

adbridge · 2021-01-07T15:47:06Z

@jeromecoutant @0xc0170 could you re-review please?

jeromecoutant

I can't accept "USBDEVICE" in the targets.json,
as there is no USB user connector.
Move this in your local mbed_app.json

targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/CMSIS/stm32g431xx.h

jeromecoutant · 2021-01-08T16:35:26Z

In parallel, I executed test suite, all tests are OK except,

drivers-usb-tests-tests-usb_device-* => see previous comment
hal-tests-tests-mbed_hal-sleep => to check (us ticker issue...)
storage-kvstore-tdbstore-tests-tests-tdbstore-whitebox => to check (issue during Multiple set test)

jeromecoutant · 2021-01-08T16:41:05Z

targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/system_clock.c

+  *                     | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
+  *                     | 3- USE_PLL_HSI (internal 16 MHz)
+  *-----------------------------------------------------------------
+  * SYSCLK(MHz)         | 64


You should be able to copy paste system_clock.c file from #14149

targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/CMSIS/stm32g431xx.h

targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/STM32G4xx_HAL_Driver/stm32g4xx_hal.c

targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/CMakeLists.txt

ciarmcom · 2021-01-19T12:51:43Z

This pull request has automatically been marked as stale because it has had no recent activity. , please complete review of the changes to move the PR forward. Thank you for your contributions.

0xc0170 · 2021-01-20T09:16:19Z

@taunomagnusson Would you be able to respond to the review or shall this be closed?

taunomagnusson · 2021-01-23T18:28:26Z

Hi - I will fix it. Some other things that took priority. Expect a update in a few days.

0xc0170

Just one cosmetic change, otherwise LGTM

targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/CMakeLists.txt

jeromecoutant · 2021-01-25T12:48:47Z

targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/system_clock.c

+  *                     | 3- USE_PLL_HSI (internal 16 MHz)
+  *-----------------------------------------------------------------
+  * SYSCLK(MHz)         | 160 (default configuration) / 170 (CAN disabled)
+  * USB capable         | NO


You should set as YES ?
(maybe with comment "to be set in mbed_app.json" ?)

Oh, you removed the code for that.
So as you want, you can add back clock configuration for USB, or not.

Ok, I'll add back the clock config then! Then it's just a targets.json edit to get the USB Device up and running.
Will modify to YES and add some comments. Need to test it a bit.

Actually, I see now that the RCC clock is connected to HSI48 in trng_api.c/trng_init using HAL_RCCEx_PeriphCLKConfig.

However, there is no similar construct in the init phase for USB (USBPhyHw.h/USBPhy_STM32.cpp).

I see that RCC_CCIPR/CLK48SEL resets to 00 (HSI48 Selected) though, so if it is preserved after reset USB should work without a HAL_RCCEx_PeriphCLKConfig statement in system_clock.c (or in USBPhy_STM32.cpp).

But is that good practice? Or better to keep the HAL_RCCEx_PeriphCLKConfig enabling statement in either system_clock.c or USBPhy_STM32.cpp? Note that RCC clock is also selected on CLK48SEL, and it adds a HAL_RCCEx_PeriphCLKConfig (in trng_api.c) to enable it in its init procedure.

In addition, several other boards have a CLK48SEL enabling statement using HAL_RCCEx_PeriphCLKConfig in their system_clock.c (DISCO/NUCLEO_F413ZH, NUCLEO_F446RE/ZE, DISCO_F469NI, ...).

Anyway, I've added the HAL_RCCEx_PeriphCLKConfig for USB Clock in G431KB/system_clock.c. I'd recommend this - if you are ok with that you might want to consider it for 474RE as well (to keep the code aligned).

Pull request has been modified.

…on. Also added so that the CK48 Clock Mux selects HSI48 for both RNG and USB. Without these the RNG/USB will be clocked at PLLQ (170 MHz) and not work.

…e HSI48 CLK for USB. Assumption is that the STM32G4 reset value (defaults to HSI48 selected for USB) is preserved throughout Mbed initialization.

…ard platforms (NUCLEO_F413ZH, ...)) it appears that even though the reset value defaults correctly it may be good practice to keep the HAL_RCCEx_PeriphCLKConfig statement that selects the HSI48CLK as source for USB/RNG.

ciarmcom · 2021-01-28T16:51:11Z

This pull request has automatically been marked as stale because it has had no recent activity. @ARMmbed/mbed-os-maintainers, please start CI to get the PR merged.

0xc0170 · 2021-02-02T10:54:35Z

CI started

mbed-ci · 2021-02-02T15:31:41Z

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ciarmcom added the release-type: patch Indentifies a PR as containing just a patch label Nov 27, 2020

ciarmcom requested review from jeromecoutant and a team November 27, 2020 23:00

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taunomagnusson and others added 3 commits January 24, 2021 02:15

Update README.md

00c45f2

Added entry for STM32 NUCLEO_G431KB Board

9dc882e

Update README.md

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Fixed whitespaces (a tab that should be spaces)

99d21b6

Updated to enable HSI48 Clock also for USBDEVICE define in targets.js…

80f0a37

…on. Also added so that the CK48 Clock Mux selects HSI48 for both RNG and USB. Without these the RNG/USB will be clocked at PLLQ (170 MHz) and not work.

taunomagnusson requested review from 0xc0170 and jeromecoutant January 26, 2021 01:51

Tauno Magnusson added 2 commits January 26, 2021 03:27

Removed the HAL_RCCEx_PeriphCLKConfig statement that was selecting th…

21176e9

…e HSI48 CLK for USB. Assumption is that the STM32G4 reset value (defaults to HSI48 selected for USB) is preserved throughout Mbed initialization.

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Support for ST STM32 NUCLEO-G431KB Development Board #13979

Support for ST STM32 NUCLEO-G431KB Development Board #13979

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taunomagnusson commented Nov 27, 2020

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