[NUCLEO_F401RE] Corrections in uvision exporter, GPIOs setting and SPI. #162
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emilmont
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Feb 10, 2014
[NUCLEO_F401RE] Corrections in uvision exporter, GPIOs setting and SPI.
yossi2le
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Mar 27, 2019
ccli8
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Aug 13, 2024
* Start on STM32 DMA SPI * Update all objects.hs, add interrupt function * Initial DMA code should be ready to test out... * Fix SPI interrupt-mode IRQ handlers, add SPI::transfer_and_wait * Fix CMake error when building for STM32WL processors * Now builds on all STM devices! * Properly support STM32U5 / DMA IP v3 * Start on STM32F4 support, fix hardfault on IP v1 and v3 due to incorrect indexing * Fix Rx-only transfers, add abort code, fix incorrect channel assignments for DMA IP v1 devices * Start on STM32H7 SPI DMA * Fixes for H7: Correctly manage data cache, keep SPI ISR enabled * Implement DMA SPI header constants for all remaining STM32 families. Also add support for freeing DMA channels * Try and fix build on STM32G0 * Fix build on STM32G0 * Add SPI_32BIT_WORDS label, start on fixing SPI docs * SPI: Implement reference counting so that DMA channels get freed properly * Fix issue where SPI data could get corrupted (by TI mode turning on) depending on memory layout (if your spis pointer & 0x10 was nonzero) * Mark DMA channels as unallocated when SPI bus is freed * Simplify spi_abort_asynch() * Fix some rebase issues, fix failing to allocate DMA channel on STM32U5 * Fix DMA getting stuck on STM32F4, F7, and F2
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